From 63ef0b4134426997567c3c8385c14f06dfb140b9 Mon Sep 17 00:00:00 2001 From: Dhoat Harpal Date: Tue, 28 Jun 2016 16:52:34 +0530 Subject: [PATCH 1/2] ARM: dts: msm: Add G-Link SMEM Transport entries for MSMFALCON These entries allow the G-Link SMEM Transport to function, which allows G-Link to use shared memory as an underlying physical transport. CRs-Fixed: 1043377 Change-Id: I879f2229b4ab74d760c03f2ce12a9ba3b1c9af8d Signed-off-by: Dhoat Harpal --- arch/arm/boot/dts/qcom/msmfalcon.dtsi | 52 +++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi index a737f5597c18..c7a5518f2be6 100644 --- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi +++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi @@ -269,6 +269,58 @@ qcom,mpu-enabled; }; + qcom,glink-smem-native-xprt-modem@86000000 { + compatible = "qcom,glink-smem-native-xprt"; + reg = <0x86000000 0x200000>, + <0x17911008 0x4>; + reg-names = "smem", "irq-reg-base"; + qcom,irq-mask = <0x8000>; + interrupts = <0 452 1>; + label = "mpss"; + }; + + qcom,glink-smem-native-xprt-adsp@86000000 { + compatible = "qcom,glink-smem-native-xprt"; + reg = <0x86000000 0x200000>, + <0x17911008 0x4>; + reg-names = "smem", "irq-reg-base"; + qcom,irq-mask = <0x200>; + interrupts = <0 157 1>; + label = "lpass"; + qcom,qos-config = <&glink_qos_adsp>; + qcom,ramp-time = <0xaf>; + }; + + glink_qos_adsp: qcom,glink-qos-config-adsp { + compatible = "qcom,glink-qos-config"; + qcom,flow-info = <0x3c 0x0>, + <0x3c 0x0>, + <0x3c 0x0>, + <0x3c 0x0>; + qcom,mtu-size = <0x800>; + qcom,tput-stats-cycle = <0xa>; + }; + + qcom,glink-smem-native-xprt-cdsp@86000000 { + compatible = "qcom,glink-smem-native-xprt"; + reg = <0x86000000 0x200000>, + <0x17911008 0x4>; + reg-names = "smem", "irq-reg-base"; + qcom,irq-mask = <0x20000000>; + interrupts = <0 513 1>; + label = "cdsp"; + }; + + qcom,glink-smem-native-xprt-rpm@68000 { + compatible = "qcom,glink-rpm-native-xprt"; + reg = <0x778000 0x7000>, + <0x17911008 0x4>; + reg-names = "msgram", "irq-reg-base"; + qcom,irq-mask = <0x1>; + interrupts = <0 168 1>; + label = "rpm"; + }; + glink_mpss: qcom,glink-ssr-modem { compatible = "qcom,glink_ssr"; label = "modem"; From fc9dc4a439655c9318810d819cb4e4df60faebe7 Mon Sep 17 00:00:00 2001 From: Dhoat Harpal Date: Mon, 27 Jun 2016 18:20:23 +0530 Subject: [PATCH 2/2] ARM: dts: msm: Add IPC Router devices for MSMFALCON The IPC Router devices define the topology for high-level interprocessor communication within the SoC. CRs-Fixed: 1043377 Change-Id: I565c7c6323a129c4f29c8da5c3e8719121f1109d Signed-off-by: Dhoat Harpal --- arch/arm/boot/dts/qcom/msmfalcon.dtsi | 35 +++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi index c7a5518f2be6..2a944d759058 100644 --- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi +++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi @@ -395,4 +395,39 @@ qcom,glinkpkt-dev-name = "smdcntl8"; }; }; + + qcom,ipc_router { + compatible = "qcom,ipc_router"; + qcom,node-id = <1>; + }; + + qcom,ipc_router_modem_xprt { + compatible = "qcom,ipc_router_glink_xprt"; + qcom,ch-name = "IPCRTR"; + qcom,xprt-remote = "mpss"; + qcom,glink-xprt = "smem"; + qcom,xprt-linkid = <1>; + qcom,xprt-version = <1>; + qcom,fragmented-data; + }; + + qcom,ipc_router_q6_xprt { + compatible = "qcom,ipc_router_glink_xprt"; + qcom,ch-name = "IPCRTR"; + qcom,xprt-remote = "lpass"; + qcom,glink-xprt = "smem"; + qcom,xprt-linkid = <1>; + qcom,xprt-version = <1>; + qcom,fragmented-data; + }; + + qcom,ipc_router_cdsp_xprt { + compatible = "qcom,ipc_router_glink_xprt"; + qcom,ch-name = "IPCRTR"; + qcom,xprt-remote = "cdsp"; + qcom,glink-xprt = "smem"; + qcom,xprt-linkid = <1>; + qcom,xprt-version = <1>; + qcom,fragmented-data; + }; };