iwlwifi: mvm: support alive notification api version2
Alive notification ver2 support error table information for 2 CPUs. This is useful to fetch the error information in case of firmware assert. Signed-off-by: Eran Harary <eran.harary@intel.com> Reviewed-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
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4 changed files with 129 additions and 9 deletions
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@ -411,6 +411,35 @@ struct mvm_alive_resp {
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__le32 scd_base_ptr; /* SRAM address for SCD */
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} __packed; /* ALIVE_RES_API_S_VER_1 */
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struct mvm_alive_resp_ver2 {
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__le16 status;
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__le16 flags;
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u8 ucode_minor;
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u8 ucode_major;
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__le16 id;
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u8 api_minor;
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u8 api_major;
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u8 ver_subtype;
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u8 ver_type;
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u8 mac;
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u8 opt;
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__le16 reserved2;
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__le32 timestamp;
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__le32 error_event_table_ptr; /* SRAM address for error log */
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__le32 log_event_table_ptr; /* SRAM address for LMAC event log */
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__le32 cpu_register_ptr;
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__le32 dbgm_config_ptr;
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__le32 alive_counter_ptr;
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__le32 scd_base_ptr; /* SRAM address for SCD */
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__le32 st_fwrd_addr; /* pointer to Store and forward */
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__le32 st_fwrd_size;
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u8 umac_minor; /* UMAC version: minor */
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u8 umac_major; /* UMAC version: major */
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__le16 umac_id; /* UMAC version: id */
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__le32 error_info_addr; /* SRAM address for UMAC error log */
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__le32 dbg_print_buff_addr;
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} __packed; /* ALIVE_RES_API_S_VER_2 */
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/* Error response/notification */
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enum {
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FW_ERR_UNKNOWN_CMD = 0x0,
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@ -110,18 +110,46 @@ static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
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container_of(notif_wait, struct iwl_mvm, notif_wait);
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struct iwl_mvm_alive_data *alive_data = data;
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struct mvm_alive_resp *palive;
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struct mvm_alive_resp_ver2 *palive2;
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palive = (void *)pkt->data;
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if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
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palive = (void *)pkt->data;
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mvm->error_event_table = le32_to_cpu(palive->error_event_table_ptr);
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mvm->log_event_table = le32_to_cpu(palive->log_event_table_ptr);
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alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
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mvm->support_umac_log = false;
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mvm->error_event_table =
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le32_to_cpu(palive->error_event_table_ptr);
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mvm->log_event_table = le32_to_cpu(palive->log_event_table_ptr);
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alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
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alive_data->valid = le16_to_cpu(palive->status) == IWL_ALIVE_STATUS_OK;
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IWL_DEBUG_FW(mvm,
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"Alive ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
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le16_to_cpu(palive->status), palive->ver_type,
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palive->ver_subtype, palive->flags);
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alive_data->valid = le16_to_cpu(palive->status) ==
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IWL_ALIVE_STATUS_OK;
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IWL_DEBUG_FW(mvm,
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"Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
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le16_to_cpu(palive->status), palive->ver_type,
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palive->ver_subtype, palive->flags);
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} else {
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palive2 = (void *)pkt->data;
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mvm->support_umac_log = true;
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mvm->error_event_table =
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le32_to_cpu(palive2->error_event_table_ptr);
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mvm->log_event_table =
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le32_to_cpu(palive2->log_event_table_ptr);
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alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr);
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mvm->umac_error_event_table =
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le32_to_cpu(palive2->error_info_addr);
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alive_data->valid = le16_to_cpu(palive2->status) ==
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IWL_ALIVE_STATUS_OK;
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IWL_DEBUG_FW(mvm,
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"Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
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le16_to_cpu(palive2->status), palive2->ver_type,
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palive2->ver_subtype, palive2->flags);
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IWL_DEBUG_FW(mvm,
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"UMAC version: Major - 0x%x, Minor - 0x%x\n",
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palive2->umac_major, palive2->umac_minor);
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}
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return true;
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}
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@ -457,6 +457,8 @@ struct iwl_mvm {
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bool init_ucode_complete;
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u32 error_event_table;
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u32 log_event_table;
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u32 umac_error_event_table;
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bool support_umac_log;
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u32 ampdu_ref;
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@ -376,9 +376,67 @@ struct iwl_error_event_table {
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u32 flow_handler; /* FH read/write pointers, RX credit */
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} __packed;
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/*
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* UMAC error struct - relevant starting from family 8000 chip.
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* Note: This structure is read from the device with IO accesses,
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* and the reading already does the endian conversion. As it is
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* read with u32-sized accesses, any members with a different size
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* need to be ordered correctly though!
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*/
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struct iwl_umac_error_event_table {
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u32 valid; /* (nonzero) valid, (0) log is empty */
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u32 error_id; /* type of error */
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u32 pc; /* program counter */
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u32 blink1; /* branch link */
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u32 blink2; /* branch link */
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u32 ilink1; /* interrupt link */
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u32 ilink2; /* interrupt link */
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u32 data1; /* error-specific data */
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u32 data2; /* error-specific data */
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u32 line; /* source code line of error */
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u32 umac_ver; /* umac version */
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} __packed;
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#define ERROR_START_OFFSET (1 * sizeof(u32))
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#define ERROR_ELEM_SIZE (7 * sizeof(u32))
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static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
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{
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struct iwl_trans *trans = mvm->trans;
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struct iwl_umac_error_event_table table;
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u32 base;
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base = mvm->umac_error_event_table;
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if (base < 0x800000 || base >= 0x80C000) {
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IWL_ERR(mvm,
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"Not valid error log pointer 0x%08X for %s uCode\n",
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base,
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(mvm->cur_ucode == IWL_UCODE_INIT)
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? "Init" : "RT");
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return;
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}
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iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
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if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
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IWL_ERR(trans, "Start IWL Error Log Dump:\n");
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IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
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mvm->status, table.valid);
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}
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IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
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desc_lookup(table.error_id));
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IWL_ERR(mvm, "0x%08X | umac uPc\n", table.pc);
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IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
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IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
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IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
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IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
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IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
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IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
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IWL_ERR(mvm, "0x%08X | umac version\n", table.umac_ver);
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}
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void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
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{
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struct iwl_trans *trans = mvm->trans;
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@ -451,6 +509,9 @@ void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
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IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
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IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
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IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
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if (mvm->support_umac_log)
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iwl_mvm_dump_umac_error_log(mvm);
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}
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void iwl_mvm_dump_sram(struct iwl_mvm *mvm)
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