msm: mdss: increase mdp core clock to match panel pixel clock

In case of command mode panel, the pixel clock can be increased in order
to finish transfer faster. In such cases we can increase the core clock
in order to match the pixel clock and finish the transfer faster.

Change-Id: I44a01e42c687ce20d4dbfa068478ad438433a581
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
This commit is contained in:
Adrian Salido-Moreno 2014-10-21 10:37:01 -07:00 committed by David Keitel
parent 16306ffd81
commit 0334ed1fc3

View file

@ -684,6 +684,10 @@ static void mdss_mdp_perf_calc_mixer(struct mdss_mdp_mixer *mixer,
if (!pinfo) /* perf for bus writeback */
perf->bw_overlap =
fps * mixer->width * mixer->height * 3;
/* for command mode, run as fast as the link allows us */
else if ((pinfo->type == MIPI_CMD_PANEL) &&
(pinfo->mipi.dsi_pclk_rate > perf->mdp_clk_rate))
perf->mdp_clk_rate = pinfo->mipi.dsi_pclk_rate;
}
/*