evie/android_kernel_oneplus_msm8998
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drivers: thermal: Use FCAP scm call instead of DMAX in LMH DCVSh

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LMH-DCVSh driver right now achieves the software mitigation by using
the domain max scm call. But this could have some delays in clearing
the mitigation.

To avoid the delay, use the frequency cap scm call to place the
mitigation.

Change-Id: I00f1b2534505e02c8e66f6ce8088c37bfbb98198
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
This commit is contained in:
Manaf Meethalavalappu Pallikunhi 2019-06-25 18:06:17 +05:30
parent f6ee0c2bb4
commit 03f0af3c21
1 changed files with 20 additions and 13 deletions
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33
drivers/thermal/msm_lmh_dcvs.c
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@ -1,4 +1,4 @@
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2016-2017, 2019 The Linux Foundation. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and * it under the terms of the GNU General Public License version 2 and
@ -54,7 +54,7 @@
#define MSM_LIMITS_CLUSTER_0 0x6370302D #define MSM_LIMITS_CLUSTER_0 0x6370302D
#define MSM_LIMITS_CLUSTER_1 0x6370312D #define MSM_LIMITS_CLUSTER_1 0x6370312D
#define MSM_LIMITS_DOMAIN_MAX 0x444D4158 #define MSM_LIMIT_FREQ_CAP 0x46434150
#define MSM_LIMITS_HIGH_THRESHOLD_VAL 95000 #define MSM_LIMITS_HIGH_THRESHOLD_VAL 95000
#define MSM_LIMITS_ARM_THRESHOLD_VAL 65000 #define MSM_LIMITS_ARM_THRESHOLD_VAL 65000
@ -194,34 +194,40 @@ static irqreturn_t lmh_dcvs_handle_isr(int irq, void *data)
} }
static int msm_lmh_dcvs_write(uint32_t node_id, uint32_t fn, static int msm_lmh_dcvs_write(uint32_t node_id, uint32_t fn,
uint32_t setting, uint32_t val) uint32_t setting, uint32_t val, uint32_t val1,
bool enable_val1)
{ {
int ret; int ret;
struct scm_desc desc_arg; struct scm_desc desc_arg;
uint32_t *payload = NULL; uint32_t *payload = NULL;
uint32_t payload_len;
payload = kzalloc(sizeof(uint32_t) * 5, GFP_KERNEL); payload_len = ((enable_val1) ? 6 : 5) * sizeof(uint32_t);
payload = kcalloc((enable_val1) ? 6 : 5, sizeof(uint32_t), GFP_KERNEL);
if (!payload) if (!payload)
return -ENOMEM; return -ENOMEM;
payload[0] = fn; /* algorithm */ payload[0] = fn; /* algorithm */
payload[1] = 0; /* unused sub-algorithm */ payload[1] = 0; /* unused sub-algorithm */
payload[2] = setting; payload[2] = setting;
payload[3] = 1; /* number of values */ payload[3] = enable_val1 ? 2 : 1; /* number of values */
payload[4] = val; payload[4] = val;
if (enable_val1)
payload[5] = val1;
desc_arg.args[0] = SCM_BUFFER_PHYS(payload); desc_arg.args[0] = SCM_BUFFER_PHYS(payload);
desc_arg.args[1] = sizeof(uint32_t) * 5; desc_arg.args[1] = payload_len;
desc_arg.args[2] = MSM_LIMITS_NODE_DCVS; desc_arg.args[2] = MSM_LIMITS_NODE_DCVS;
desc_arg.args[3] = node_id; desc_arg.args[3] = node_id;
desc_arg.args[4] = 0; /* version */ desc_arg.args[4] = 0; /* version */
desc_arg.arginfo = SCM_ARGS(5, SCM_RO, SCM_VAL, SCM_VAL, desc_arg.arginfo = SCM_ARGS(5, SCM_RO, SCM_VAL, SCM_VAL,
SCM_VAL, SCM_VAL); SCM_VAL, SCM_VAL);
dmac_flush_range(payload, (void *)payload + 5 * (sizeof(uint32_t))); dmac_flush_range(payload, (void *)payload + payload_len);
ret = scm_call2(SCM_SIP_FNID(SCM_SVC_LMH, MSM_LIMITS_DCVSH), &desc_arg); ret = scm_call2(SCM_SIP_FNID(SCM_SVC_LMH, MSM_LIMITS_DCVSH), &desc_arg);
kfree(payload); kfree(payload);
return ret; return ret;
} }
@ -265,7 +271,7 @@ static int lmh_activate_trip(struct thermal_zone_device *dev,
case LIMITS_TRIP_LO: case LIMITS_TRIP_LO:
ret = msm_lmh_dcvs_write(hw->affinity, ret = msm_lmh_dcvs_write(hw->affinity,
MSM_LIMITS_SUB_FN_THERMAL, MSM_LIMITS_SUB_FN_THERMAL,
MSM_LIMITS_ARM_THRESHOLD, temp); MSM_LIMITS_ARM_THRESHOLD, temp, 0, 0);
break; break;
case LIMITS_TRIP_HI: case LIMITS_TRIP_HI:
/* /*
@ -276,13 +282,13 @@ static int lmh_activate_trip(struct thermal_zone_device *dev,
return -EINVAL; return -EINVAL;
ret = msm_lmh_dcvs_write(hw->affinity, ret = msm_lmh_dcvs_write(hw->affinity,
MSM_LIMITS_SUB_FN_THERMAL, MSM_LIMITS_SUB_FN_THERMAL,
MSM_LIMITS_HI_THRESHOLD, temp); MSM_LIMITS_HI_THRESHOLD, temp, 0, 0);
if (ret) if (ret)
break; break;
ret = msm_lmh_dcvs_write(hw->affinity, ret = msm_lmh_dcvs_write(hw->affinity,
MSM_LIMITS_SUB_FN_THERMAL, MSM_LIMITS_SUB_FN_THERMAL,
MSM_LIMITS_LOW_THRESHOLD, temp - MSM_LIMITS_LOW_THRESHOLD, temp -
MSM_LIMITS_LOW_THRESHOLD_OFFSET); MSM_LIMITS_LOW_THRESHOLD_OFFSET, 0, 0);
break; break;
default: default:
return -EINVAL; return -EINVAL;
@ -347,8 +353,9 @@ static int lmh_set_max_limit(int cpu, u32 freq)
if (!hw) if (!hw)
return -EINVAL; return -EINVAL;
return msm_lmh_dcvs_write(hw->affinity, MSM_LIMITS_SUB_FN_GENERAL, return msm_lmh_dcvs_write(hw->affinity, MSM_LIMITS_SUB_FN_THERMAL,
MSM_LIMITS_DOMAIN_MAX, freq); MSM_LIMIT_FREQ_CAP, freq,
freq >= hw->max_freq ? 0 : 1, 1);
} }
static int lmh_get_cur_limit(int cpu, unsigned long *freq) static int lmh_get_cur_limit(int cpu, unsigned long *freq)
@ -457,7 +464,7 @@ static int msm_lmh_dcvs_probe(struct platform_device *pdev)
/* Enable the thermal algorithm early */ /* Enable the thermal algorithm early */
ret = msm_lmh_dcvs_write(hw->affinity, MSM_LIMITS_SUB_FN_THERMAL, ret = msm_lmh_dcvs_write(hw->affinity, MSM_LIMITS_SUB_FN_THERMAL,
MSM_LIMITS_ALGO_MODE_ENABLE, 1); MSM_LIMITS_ALGO_MODE_ENABLE, 1, 0, 0);
if (ret) if (ret)
return ret; return ret;