From 04c4790c271ae2d272f39de103d88a2036b501dd Mon Sep 17 00:00:00 2001 From: Andrei Danaila Date: Mon, 24 Nov 2014 15:27:36 -0800 Subject: [PATCH] mhi: core: Enable NER support Enable support for NER as part of the MHI REV E specification. NER register will now be set to the maximum number of channels supported by MHI. Change-Id: Id868c04886af13cd34720c86a55ac64debc4ab31 Signed-off-by: Andrei Danaila --- drivers/platform/msm/mhi/mhi_mmio_ops.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/platform/msm/mhi/mhi_mmio_ops.c b/drivers/platform/msm/mhi/mhi_mmio_ops.c index 21a3e35365f7..985ceee42bf7 100644 --- a/drivers/platform/msm/mhi/mhi_mmio_ops.c +++ b/drivers/platform/msm/mhi/mhi_mmio_ops.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2014, The Linux Foundation. All rights reserved. +/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -106,6 +106,10 @@ enum MHI_STATUS mhi_init_mmio(struct mhi_device_ctxt *mhi_dev_ctxt) mhi_log(MHI_MSG_INFO, "Setting all MMIO values.\n"); + mhi_reg_write_field(mhi_dev_ctxt, mhi_dev_ctxt->mmio_addr, MHICFG, + MHICFG_NER_MASK, MHICFG_NER_SHIFT, + MHI_MAX_CHANNELS); + pcie_dword_val = mhi_v2p_addr(mhi_dev_ctxt->mhi_ctrl_seg_info, (uintptr_t)mhi_dev_ctxt->mhi_ctrl_seg->mhi_cc_list); pcie_word_val = HIGH_WORD(pcie_dword_val);