From 0574be1ea85a85f28ffd86ac2bd84a2ce7568a3a Mon Sep 17 00:00:00 2001 From: Abhimanyu Kapur <abhimany@codeaurora.org> Date: Fri, 12 Feb 2016 17:34:46 -0800 Subject: [PATCH] irqchip: GICv3: Check if GIC register access is controlled Add support to configure ITS registers only if higher exception levels have not already configured them. Change-Id: I45eaa51e56e034d011cf41d8b924fb674f63447d Signed-off-by: Hanumant Singh <hanumant@codeaurora.org> Signed-off-by: Puja Gupta <pujag@codeaurora.org> [abhimany: resolved minor merge conflict] Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org> --- drivers/irqchip/Kconfig | 7 +++++++ drivers/irqchip/irq-gic-v3.c | 6 ++++-- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index ef3e3c9725ee..7ad925670d44 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -27,6 +27,13 @@ config ARM_GIC_V3_ITS bool select PCI_MSI_IRQ_DOMAIN +config ARM_GIC_V3_ACL + bool "GICv3 Access control" + depends on ARM_GIC_V3 + help + Access to GIC ITS address space is controlled by EL2. + Kernel has no permission to access ITS + config ARM_GIC_V3_NO_ACCESS_CONTROL bool "GICv3 No Access Control Configuration" depends on ARM_GIC_V3 diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 6bcf4281422c..b85ea63b460e 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -594,7 +594,8 @@ static void gic_cpu_init(void) gic_cpu_config(rbase, gic_redist_wait_for_rwp); /* Give LPIs a spin */ - if (IS_ENABLED(CONFIG_ARM_GIC_V3_ITS) && gic_dist_supports_lpis()) + if (IS_ENABLED(CONFIG_ARM_GIC_V3_ITS) && gic_dist_supports_lpis() && + !IS_ENABLED(CONFIG_ARM_GIC_V3_ACL)) its_cpu_init(); /* initialise system registers */ @@ -1035,7 +1036,8 @@ static int __init gic_of_init(struct device_node *node, struct device_node *pare set_handle_irq(gic_handle_irq); - if (IS_ENABLED(CONFIG_ARM_GIC_V3_ITS) && gic_dist_supports_lpis()) + if (IS_ENABLED(CONFIG_ARM_GIC_V3_ITS) && gic_dist_supports_lpis() && + !IS_ENABLED(CONFIG_ARM_GIC_V3_ACL)) its_init(node, &gic_data.rdists, gic_data.domain); gic_chip.flags |= gic_arch_extn.flags;