staging: comedi: ni_stc.h: tidy up DIO_Output_Register and bits
Rename the CamelCase. Use the BIT() macro to define the bits. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2 changed files with 23 additions and 21 deletions
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@ -323,10 +323,10 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
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[NISTC_AI_CMD1_REG] = { 0x110, 2 },
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[NISTC_AI_CMD1_REG] = { 0x110, 2 },
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[NISTC_AO_CMD1_REG] = { 0x112, 2 },
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[NISTC_AO_CMD1_REG] = { 0x112, 2 },
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/*
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/*
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* DIO_Output_Register maps to:
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* NISTC_DIO_OUT_REG maps to:
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* { NI_M_DIO_REG, 4 } and { NI_M_SCXI_SER_DO_REG, 1 }
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* { NI_M_DIO_REG, 4 } and { NI_M_SCXI_SER_DO_REG, 1 }
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*/
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*/
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[DIO_Output_Register] = { 0, 0 }, /* DOES NOT MAP CLEANLY */
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[NISTC_DIO_OUT_REG] = { 0, 0 }, /* DOES NOT MAP CLEANLY */
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[DIO_Control_Register] = { 0, 0 }, /* DOES NOT MAP CLEANLY */
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[DIO_Control_Register] = { 0, 0 }, /* DOES NOT MAP CLEANLY */
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[AI_Mode_1_Register] = { 0x118, 2 },
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[AI_Mode_1_Register] = { 0x118, 2 },
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[AI_Mode_2_Register] = { 0x11a, 2 },
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[AI_Mode_2_Register] = { 0x11a, 2 },
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@ -3280,13 +3280,14 @@ static int ni_dio_insn_bits(struct comedi_device *dev,
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struct ni_private *devpriv = dev->private;
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struct ni_private *devpriv = dev->private;
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/* Make sure we're not using the serial part of the dio */
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/* Make sure we're not using the serial part of the dio */
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if ((data[0] & (DIO_SDIN | DIO_SDOUT)) && devpriv->serial_interval_ns)
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if ((data[0] & (NISTC_DIO_SDIN | NISTC_DIO_SDOUT)) &&
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devpriv->serial_interval_ns)
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return -EBUSY;
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return -EBUSY;
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if (comedi_dio_update_state(s, data)) {
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if (comedi_dio_update_state(s, data)) {
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devpriv->dio_output &= ~DIO_Parallel_Data_Mask;
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devpriv->dio_output &= ~NISTC_DIO_OUT_PARALLEL_MASK;
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devpriv->dio_output |= DIO_Parallel_Data_Out(s->state);
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devpriv->dio_output |= NISTC_DIO_OUT_PARALLEL(s->state);
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ni_stc_writew(dev, devpriv->dio_output, DIO_Output_Register);
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ni_stc_writew(dev, devpriv->dio_output, NISTC_DIO_OUT_REG);
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}
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}
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data[1] = ni_stc_readw(dev, DIO_Parallel_Input_Register);
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data[1] = ni_stc_readw(dev, DIO_Parallel_Input_Register);
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@ -3543,9 +3544,9 @@ static int ni_serial_hw_readwrite8(struct comedi_device *dev,
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unsigned int status1;
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unsigned int status1;
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int err = 0, count = 20;
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int err = 0, count = 20;
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devpriv->dio_output &= ~DIO_Serial_Data_Mask;
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devpriv->dio_output &= ~NISTC_DIO_OUT_SERIAL_MASK;
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devpriv->dio_output |= DIO_Serial_Data_Out(data_out);
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devpriv->dio_output |= NISTC_DIO_OUT_SERIAL(data_out);
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ni_stc_writew(dev, devpriv->dio_output, DIO_Output_Register);
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ni_stc_writew(dev, devpriv->dio_output, NISTC_DIO_OUT_REG);
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status1 = ni_stc_readw(dev, Joint_Status_1_Register);
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status1 = ni_stc_readw(dev, Joint_Status_1_Register);
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if (status1 & DIO_Serial_IO_In_Progress_St) {
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if (status1 & DIO_Serial_IO_In_Progress_St) {
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@ -3598,10 +3599,10 @@ static int ni_serial_sw_readwrite8(struct comedi_device *dev,
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/* Output current bit; note that we cannot touch s->state
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/* Output current bit; note that we cannot touch s->state
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because it is a per-subdevice field, and serial is
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because it is a per-subdevice field, and serial is
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a separate subdevice from DIO. */
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a separate subdevice from DIO. */
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devpriv->dio_output &= ~DIO_SDOUT;
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devpriv->dio_output &= ~NISTC_DIO_SDOUT;
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if (data_out & mask)
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if (data_out & mask)
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devpriv->dio_output |= DIO_SDOUT;
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devpriv->dio_output |= NISTC_DIO_SDOUT;
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ni_stc_writew(dev, devpriv->dio_output, DIO_Output_Register);
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ni_stc_writew(dev, devpriv->dio_output, NISTC_DIO_OUT_REG);
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/* Assert SDCLK (active low, inverted), wait for half of
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/* Assert SDCLK (active low, inverted), wait for half of
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the delay, deassert SDCLK, and wait for the other half. */
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the delay, deassert SDCLK, and wait for the other half. */
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@ -3616,7 +3617,8 @@ static int ni_serial_sw_readwrite8(struct comedi_device *dev,
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udelay((devpriv->serial_interval_ns + 999) / 2000);
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udelay((devpriv->serial_interval_ns + 999) / 2000);
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/* Input current bit */
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/* Input current bit */
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if (ni_stc_readw(dev, DIO_Parallel_Input_Register) & DIO_SDIN)
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if (ni_stc_readw(dev, DIO_Parallel_Input_Register) &
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NISTC_DIO_SDIN)
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input |= mask;
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input |= mask;
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}
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}
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@ -164,6 +164,14 @@
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#define NISTC_AO_CMD1_LDAC0_SRC_SEL BIT(1)
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#define NISTC_AO_CMD1_LDAC0_SRC_SEL BIT(1)
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#define NISTC_AO_CMD1_UPDATE_PULSE BIT(0)
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#define NISTC_AO_CMD1_UPDATE_PULSE BIT(0)
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#define NISTC_DIO_OUT_REG 10
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#define NISTC_DIO_OUT_SERIAL(x) (((x) & 0xff) << 8)
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#define NISTC_DIO_OUT_SERIAL_MASK NISTC_DIO_OUT_SERIAL(0xff)
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#define NISTC_DIO_OUT_PARALLEL(x) ((x) & 0xff)
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#define NISTC_DIO_OUT_PARALLEL_MASK NISTC_DIO_OUT_PARALLEL(0xff)
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#define NISTC_DIO_SDIN BIT(4)
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#define NISTC_DIO_SDOUT BIT(0)
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#define AI_Status_1_Register 2
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#define AI_Status_1_Register 2
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#define Interrupt_A_St 0x8000
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#define Interrupt_A_St 0x8000
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#define AI_FIFO_Full_St 0x4000
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#define AI_FIFO_Full_St 0x4000
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@ -206,14 +214,6 @@
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#define DIO_Parallel_Input_Register 7
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#define DIO_Parallel_Input_Register 7
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#define DIO_Output_Register 10
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#define DIO_Parallel_Data_Out(a) ((a)&0xff)
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#define DIO_Parallel_Data_Mask 0xff
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#define DIO_SDOUT _bit0
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#define DIO_SDIN _bit4
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#define DIO_Serial_Data_Out(a) (((a)&0xff)<<8)
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#define DIO_Serial_Data_Mask 0xff00
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#define DIO_Control_Register 11
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#define DIO_Control_Register 11
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#define DIO_Software_Serial_Control _bit11
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#define DIO_Software_Serial_Control _bit11
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#define DIO_HW_Serial_Timebase _bit10
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#define DIO_HW_Serial_Timebase _bit10
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