x86/AMD: Apply erratum 665 on machines without a BIOS fix
commit d1992996753132e2dafe955cccb2fb0714d3cfc4 upstream. AMD F12h machines have an erratum which can cause DIV/IDIV to behave unpredictably. The workaround is to set MSRC001_1029[31] but sometimes there is no BIOS update containing that workaround so let's do it ourselves unconditionally. It is simple enough. [ Borislav: Wrote commit message. ] Signed-off-by: Emanuel Czirai <icanrealizeum@gmail.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Yaowu Xu <yaowu@google.com> Link: http://lkml.kernel.org/r/20160902053550.18097-1-bp@alien8.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -656,6 +656,17 @@ static void init_amd_gh(struct cpuinfo_x86 *c)
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set_cpu_bug(c, X86_BUG_AMD_TLB_MMATCH);
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}
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#define MSR_AMD64_DE_CFG 0xC0011029
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static void init_amd_ln(struct cpuinfo_x86 *c)
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{
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/*
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* Apply erratum 665 fix unconditionally so machines without a BIOS
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* fix work.
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*/
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msr_set_bit(MSR_AMD64_DE_CFG, 31);
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}
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static void init_amd_bd(struct cpuinfo_x86 *c)
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{
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u64 value;
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@ -713,6 +724,7 @@ static void init_amd(struct cpuinfo_x86 *c)
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case 6: init_amd_k7(c); break;
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case 0xf: init_amd_k8(c); break;
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case 0x10: init_amd_gh(c); break;
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case 0x12: init_amd_ln(c); break;
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case 0x15: init_amd_bd(c); break;
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}
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