evie/android_kernel_oneplus_msm8998
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drm/msm: add default value for plane enum property

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Add default value support for plane enum property which caller is
able to pass in different default value when initialize the enum
property list.

Change-Id: I57595bf7c42b0e528a18ab0951655a169b00d611
Signed-off-by: Jin Li <jinl@codeaurora.org>
Signed-off-by: Yunyun Cao <yunyunc@codeaurora.org>
This commit is contained in:
Jin Li 2016-11-22 15:39:35 -05:00 • committed by Gerrit - the friendly Code Review server
parent c1a5075d60
commit 07855f70a3
5 changed files with 13 additions and 9 deletions
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4
drivers/gpu/drm/msm/msm_prop.c
View file

@ -304,7 +304,7 @@ void msm_property_install_rotation(struct msm_property_info *info,
void msm_property_install_enum(struct msm_property_info *info, void msm_property_install_enum(struct msm_property_info *info,
const char *name, int flags, int is_bitmask, const char *name, int flags, int is_bitmask,
const struct drm_prop_enum_list *values, int num_values, const struct drm_prop_enum_list *values, int num_values,
uint32_t property_idx) uint32_t property_idx, uint64_t default_value)
{ {
struct drm_property **prop; struct drm_property **prop;
@ -337,7 +337,7 @@ void msm_property_install_enum(struct msm_property_info *info,
} }
/* save init value for later */ /* save init value for later */
info->property_data[property_idx].default_value = 0; info->property_data[property_idx].default_value = default_value;
info->property_data[property_idx].force_dirty = false; info->property_data[property_idx].force_dirty = false;
/* always attach property, if created */ /* always attach property, if created */

4
drivers/gpu/drm/msm/msm_prop.h
View file

@ -267,6 +267,7 @@ void msm_property_install_rotation(struct msm_property_info *info,
* @values: Array of allowable enumeration/bitmask values * @values: Array of allowable enumeration/bitmask values
* @num_values: Size of values array * @num_values: Size of values array
* @property_idx: Property index * @property_idx: Property index
* @default_value: Default value of current property
*/ */
void msm_property_install_enum(struct msm_property_info *info, void msm_property_install_enum(struct msm_property_info *info,
const char *name, const char *name,
@ -274,7 +275,8 @@ void msm_property_install_enum(struct msm_property_info *info,
int is_bitmask, int is_bitmask,
const struct drm_prop_enum_list *values, const struct drm_prop_enum_list *values,
int num_values, int num_values,
uint32_t property_idx); uint32_t property_idx,
uint64_t default_value);
/** /**
* msm_property_install_blob - install standard drm blob property * msm_property_install_blob - install standard drm blob property

4
drivers/gpu/drm/msm/sde/sde_connector.c
View file

@ -736,11 +736,11 @@ struct drm_connector *sde_connector_init(struct drm_device *dev,
msm_property_install_enum(&c_conn->property_info, "topology_name", msm_property_install_enum(&c_conn->property_info, "topology_name",
DRM_MODE_PROP_IMMUTABLE, 0, e_topology_name, DRM_MODE_PROP_IMMUTABLE, 0, e_topology_name,
ARRAY_SIZE(e_topology_name), ARRAY_SIZE(e_topology_name),
CONNECTOR_PROP_TOPOLOGY_NAME); CONNECTOR_PROP_TOPOLOGY_NAME, 0);
msm_property_install_enum(&c_conn->property_info, "topology_control", msm_property_install_enum(&c_conn->property_info, "topology_control",
0, 1, e_topology_control, 0, 1, e_topology_control,
ARRAY_SIZE(e_topology_control), ARRAY_SIZE(e_topology_control),
CONNECTOR_PROP_TOPOLOGY_CONTROL); CONNECTOR_PROP_TOPOLOGY_CONTROL, 0);
rc = msm_property_install_get_status(&c_conn->property_info); rc = msm_property_install_get_status(&c_conn->property_info);
if (rc) { if (rc) {

2
drivers/gpu/drm/msm/sde/sde_crtc.c
View file

@ -1361,7 +1361,7 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc,
msm_property_install_enum(&sde_crtc->property_info, "security_level", msm_property_install_enum(&sde_crtc->property_info, "security_level",
0x0, 0, e_secure_level, 0x0, 0, e_secure_level,
ARRAY_SIZE(e_secure_level), ARRAY_SIZE(e_secure_level),
CRTC_PROP_SECURITY_LEVEL); CRTC_PROP_SECURITY_LEVEL, SDE_DRM_SEC_NON_SEC);
sde_kms_info_reset(info); sde_kms_info_reset(info);

8
drivers/gpu/drm/msm/sde/sde_plane.c
View file

@ -1907,10 +1907,12 @@ static void _sde_plane_install_properties(struct drm_plane *plane,
BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y), PLANE_PROP_ROTATION); BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y), PLANE_PROP_ROTATION);
msm_property_install_enum(&psde->property_info, "blend_op", 0x0, 0, msm_property_install_enum(&psde->property_info, "blend_op", 0x0, 0,
e_blend_op, ARRAY_SIZE(e_blend_op), PLANE_PROP_BLEND_OP); e_blend_op, ARRAY_SIZE(e_blend_op), PLANE_PROP_BLEND_OP,
SDE_DRM_BLEND_OP_PREMULTIPLIED);
msm_property_install_enum(&psde->property_info, "src_config", 0x0, 1, msm_property_install_enum(&psde->property_info, "src_config", 0x0, 1,
e_src_config, ARRAY_SIZE(e_src_config), PLANE_PROP_SRC_CONFIG); e_src_config, ARRAY_SIZE(e_src_config), PLANE_PROP_SRC_CONFIG,
0);
list_for_each_entry(pp, &psde->phy_plane_head, phy_plane_list) { list_for_each_entry(pp, &psde->phy_plane_head, phy_plane_list) {
if (pp->pipe_hw->ops.setup_solidfill) if (pp->pipe_hw->ops.setup_solidfill)
@ -1973,7 +1975,7 @@ static void _sde_plane_install_properties(struct drm_plane *plane,
0x0, 0x0,
0, e_fb_translation_mode, 0, e_fb_translation_mode,
ARRAY_SIZE(e_fb_translation_mode), ARRAY_SIZE(e_fb_translation_mode),
PLANE_PROP_FB_TRANSLATION_MODE); PLANE_PROP_FB_TRANSLATION_MODE, SDE_DRM_FB_NON_SEC);
} }
static inline void _sde_plane_set_csc_v1(struct sde_phy_plane *pp, static inline void _sde_plane_set_csc_v1(struct sde_phy_plane *pp,