evie/android_kernel_oneplus_msm8998
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

drm/i915: fix opregion backlight chip detect and range

Browse source 
BLC_PWM_CTL2 is for 965+ only, so add device model check for
legacy backlight control.

For native backlight control, it maps the backlight value (0~255)
in opregion ASLE[BCLP] to backlight duty cycle (0~max_backlight)
and set into control register.

It also add support for IGD device, which follows opregion spec.

Signed-off-by: Li Peng <peng.li@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
Li Peng 2009-09-15 13:03:36 +08:00 • committed by Jesse Barnes
parent 8dd81a381e
commit 078a033f45
1 changed files with 17 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

22
drivers/gpu/drm/i915/i915_opregion.c
View file

@ -148,6 +148,7 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
struct opregion_asle *asle = dev_priv->opregion.asle; struct opregion_asle *asle = dev_priv->opregion.asle;
u32 blc_pwm_ctl, blc_pwm_ctl2; u32 blc_pwm_ctl, blc_pwm_ctl2;
u32 max_backlight, level, shift;
if (!(bclp & ASLE_BCLP_VALID)) if (!(bclp & ASLE_BCLP_VALID))
return ASLE_BACKLIGHT_FAIL; return ASLE_BACKLIGHT_FAIL;
@ -157,14 +158,25 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
return ASLE_BACKLIGHT_FAIL; return ASLE_BACKLIGHT_FAIL;
blc_pwm_ctl = I915_READ(BLC_PWM_CTL); blc_pwm_ctl = I915_READ(BLC_PWM_CTL);
blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
blc_pwm_ctl2 = I915_READ(BLC_PWM_CTL2); blc_pwm_ctl2 = I915_READ(BLC_PWM_CTL2);
if (blc_pwm_ctl2 & BLM_COMBINATION_MODE) if (IS_I965G(dev) && (blc_pwm_ctl2 & BLM_COMBINATION_MODE))
pci_write_config_dword(dev->pdev, PCI_LBPC, bclp); pci_write_config_dword(dev->pdev, PCI_LBPC, bclp);
else else {
I915_WRITE(BLC_PWM_CTL, blc_pwm_ctl | ((bclp * 0x101)-1)); if (IS_IGD(dev)) {
blc_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);
max_backlight = (blc_pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >>
BACKLIGHT_MODULATION_FREQ_SHIFT;
shift = BACKLIGHT_DUTY_CYCLE_SHIFT + 1;
} else {
blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
max_backlight = ((blc_pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >>
BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
shift = BACKLIGHT_DUTY_CYCLE_SHIFT;
}
level = (bclp * max_backlight) / 255;
I915_WRITE(BLC_PWM_CTL, blc_pwm_ctl | (level << shift));
}
asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID; asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID;
return 0; return 0;