From 07be828dfe261a8c1688d47734f0651646f3de1b Mon Sep 17 00:00:00 2001 From: Mayank Rana Date: Wed, 16 Mar 2016 21:38:29 -0700 Subject: [PATCH] usb: phy: qmp: Remove both phy_clk_scheme based init functionality Currently QMP PHY driver expects to have both se_clk and diff_clk based PHY initialization sequence from devicetree. This change removes need of both phy_clk_scheme based init sequence as on newer platform QMP PHY only uses one of phy_clk_scheme. Signed-off-by: Mayank Rana --- Documentation/devicetree/bindings/usb/msm-phy.txt | 4 ++-- drivers/usb/phy/phy-msm-ssusb-qmp.c | 10 +++------- 2 files changed, 5 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/msm-phy.txt b/Documentation/devicetree/bindings/usb/msm-phy.txt index e7ec455a64c8..4abab6812aa0 100644 --- a/Documentation/devicetree/bindings/usb/msm-phy.txt +++ b/Documentation/devicetree/bindings/usb/msm-phy.txt @@ -115,8 +115,8 @@ Optional properties: the USB PHY and the controller must rely on external VBUS notification in order to manually relay the notification to the SSPHY. - qcom,emulation: Indicates that we are running on emulation platform. - - qcom,qmp-phy-init-seq: QMP PHY initialization sequence with reg, diff clk - value, single ended clk value, delay after register write. + - qcom,qmp-phy-init-seq: QMP PHY initialization sequence with reg offset, its + value, delay after register write. - qcom,qmp-phy-reg-offset: If present stores phy register offsets in an order defined in the phy driver. diff --git a/drivers/usb/phy/phy-msm-ssusb-qmp.c b/drivers/usb/phy/phy-msm-ssusb-qmp.c index f90998c72560..873051fcd527 100644 --- a/drivers/usb/phy/phy-msm-ssusb-qmp.c +++ b/drivers/usb/phy/phy-msm-ssusb-qmp.c @@ -83,11 +83,10 @@ unsigned int qmp_phy_rev2[] = { [USB3_PHY_START] = 0x608, }; -/* reg values to write based on the phy clk scheme selected */ +/* reg values to write */ struct qmp_reg_val { u32 offset; - u32 diff_clk_sel_val; - u32 se_clk_sel_val; + u32 val; u32 delay; }; @@ -487,7 +486,6 @@ static int configure_phy_regs(struct usb_phy *uphy, { struct msm_ssphy_qmp *phy = container_of(uphy, struct msm_ssphy_qmp, phy); - bool diff_clk_sel = true; if (!reg) { dev_err(uphy->dev, "NULL PHY configuration\n"); @@ -495,9 +493,7 @@ static int configure_phy_regs(struct usb_phy *uphy, } while (reg->offset != -1) { - writel_relaxed(diff_clk_sel ? - reg->diff_clk_sel_val : reg->se_clk_sel_val, - phy->base + reg->offset); + writel_relaxed(reg->val, phy->base + reg->offset); if (reg->delay) usleep_range(reg->delay, reg->delay + 10); reg++;