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mmc: sdhci-msm: ignore data-end-bit error in 1 bit mode

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Some SDHC controllers are unable to handle data end-bit
errors in one bit mode.
This patch adds a quirk to ignore data-end-bit error in
1-bit mode in Qualcomm SDHC controllers.

Change-Id: Ica0f10573d654021449c32197b126e12bb1a3c10
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
[venkatg@codeaurora.org: sdhci_clear_set_irqs was removed
from 3.14 kernel, write the registers directly]
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed minor merge conflict and fixed
the bitmap for the quirk macro]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
This commit is contained in:
Asutosh Das 2013-06-13 14:27:42 +05:30 • committed by Subhash Jadavani
parent 6f092797e7
commit 0c6d03791c
3 changed files with 13 additions and 0 deletions
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2
drivers/mmc/host/sdhci-msm.c
View file

@ -2396,6 +2396,8 @@ static int sdhci_msm_probe(struct platform_device *pdev)
host->quirks2 |= SDHCI_QUIRK2_RDWR_TX_ACTIVE_EOT;
}
host->quirks2 |= SDHCI_QUIRK2_IGN_DATA_END_BIT_ERROR;
/* Setup PWRCTL irq */
pwr_irq = platform_get_irq_byname(pdev, "pwr_irq");
if (pwr_irq < 0) {

6
drivers/mmc/host/sdhci.c
View file

@ -3695,6 +3695,12 @@ int sdhci_add_host(struct sdhci_host *host)
mmc_add_host(mmc);
if (host->quirks2 & SDHCI_QUIRK2_IGN_DATA_END_BIT_ERROR) {
host->ier = (host->ier & ~SDHCI_INT_DATA_END_BIT);
sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
}
pr_info("%s: SDHCI controller on %s [%s] using %s\n",
mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)),
(host->flags & SDHCI_USE_ADMA) ?

5
drivers/mmc/host/sdhci.h
View file

@ -485,6 +485,11 @@ struct sdhci_host {
*/
#define SDHCI_QUIRK2_DIVIDE_TOUT_BY_4 (1 << 23)
/*
* Some SDHC controllers are unable to handle data-end bit error in
* 1-bit mode of SDIO.
*/
#define SDHCI_QUIRK2_IGN_DATA_END_BIT_ERROR (1<<24)
int irq; /* Device IRQ */
void __iomem *ioaddr; /* Mapped address */