msm: mdss: Fix pipe number calculation for IGC

MDP hardware supports inverse gamma correction(IGC) on the source pipes.
Driver will program the LUT(Look up table) on the source pipe and
enable the IGC. Register exposes a bit mask which is equal to number of
pipes for which IGC LUT table needs to updated.
Source pipe enum values are not contiguos in nature which was resulting
in incorrect programming of IGC module.
This change fixes the issue by assigning bit mask position instead of
relying on the source pipe enum values.

Change-Id: I219cc484edd42fdd563dcb7535ceacb11e9e2d38
Signed-off-by: Ping Li <pingli@codeaurora.org>
This commit is contained in:
Ping li 2014-09-23 14:20:12 -07:00 committed by David Keitel
parent 13517698e4
commit 0d3af8c670

View file

@ -1344,17 +1344,52 @@ int mdss_mdp_pipe_sspp_setup(struct mdss_mdp_pipe *pipe, u32 *op)
switch (pipe->type) {
case MDSS_MDP_PIPE_TYPE_VIG:
pipe_base = mdata->mdp_base + MDSS_MDP_REG_IGC_VIG_BASE;
pipe_num = pipe->num - MDSS_MDP_SSPP_VIG0;
switch (pipe->num) {
case MDSS_MDP_SSPP_VIG0:
pipe_num = 0;
break;
case MDSS_MDP_SSPP_VIG1:
pipe_num = 1;
break;
case MDSS_MDP_SSPP_VIG2:
pipe_num = 2;
break;
case MDSS_MDP_SSPP_VIG3:
pipe_num = 3;
break;
default:
pr_err("Invalid pipe num %d pipe type %d\n",
pipe->num, pipe->type);
return -EINVAL;
}
break;
case MDSS_MDP_PIPE_TYPE_RGB:
pipe_base = mdata->mdp_base + MDSS_MDP_REG_IGC_RGB_BASE;
pipe_num = pipe->num - MDSS_MDP_SSPP_RGB0;
switch (pipe->num) {
case MDSS_MDP_SSPP_RGB0:
pipe_num = 0;
break;
case MDSS_MDP_SSPP_RGB1:
pipe_num = 1;
break;
case MDSS_MDP_SSPP_RGB2:
pipe_num = 2;
break;
case MDSS_MDP_SSPP_RGB3:
pipe_num = 3;
break;
default:
pr_err("Invalid pipe num %d pipe type %d\n",
pipe->num, pipe->type);
return -EINVAL;
}
break;
case MDSS_MDP_PIPE_TYPE_DMA:
pipe_base = mdata->mdp_base + MDSS_MDP_REG_IGC_DMA_BASE;
pipe_num = pipe->num - MDSS_MDP_SSPP_DMA0;
break;
default:
pr_err("Invalid pipe type %d\n", pipe->type);
return -EINVAL;
}