ASoC: wsa881x: Remove support for wsa881x 1.x chip revision
On kernel version 4.4, support for wsa881x v1.x can be dropped as it will not ship with any products using this version. CRs-fixed: 1008341 Change-Id: I7a8c28602d6c66b876b1e413791850bcaefdea98 Signed-off-by: Stephen Oglesby <soglesby@codeaurora.org>
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9194c460b8
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3 changed files with 52 additions and 167 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -154,30 +154,6 @@ static struct reg_default wsa881x_defaults[] = {
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{WSA881X_SPKR_STATUS3, 0x00},
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};
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/* Default register reset values for WSA881x rev 1.0 or 1.1 */
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static struct reg_sequence wsa881x_rev_1_x[] = {
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{WSA881X_INTR_MASK, 0x1F, 0x00},
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{WSA881X_OTP_REG_28, 0xFF, 0x00},
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{WSA881X_OTP_REG_29, 0xFF, 0x00},
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{WSA881X_OTP_REG_30, 0xFF, 0x00},
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{WSA881X_OTP_REG_31, 0xFF, 0x00},
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{WSA881X_TEMP_ADC_CTRL, 0x00, 0x00},
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{WSA881X_ADC_SEL_IBIAS, 0x25, 0x00},
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{WSA881X_SPKR_DRV_GAIN, 0x01, 0x00},
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{WSA881X_SPKR_DAC_CTL, 0x40, 0x00},
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{WSA881X_SPKR_BBM_CTL, 0x00, 0x00},
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{WSA881X_SPKR_MISC_CTL1, 0x80, 0x00},
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{WSA881X_SPKR_MISC_CTL2, 0x00, 0x00},
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{WSA881X_SPKR_BIAS_INT, 0x56, 0x00},
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{WSA881X_SPKR_BIAS_PSRR, 0x54, 0x00},
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{WSA881X_BOOST_PS_CTL, 0xC0, 0x00},
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{WSA881X_BOOST_PRESET_OUT1, 0x77, 0x00},
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{WSA881X_BOOST_LOOP_STABILITY, 0xAD, 0x00},
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{WSA881X_SPKR_PROT_ATEST2, 0x00, 0x00},
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{WSA881X_BONGO_RESRV_REG1, 0x00, 0x00},
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{WSA881X_BONGO_RESRV_REG2, 0x00, 0x00},
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};
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/* Default register reset values for WSA881x rev 2.0 */
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static struct reg_sequence wsa881x_rev_2_0[] = {
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{WSA881X_RESET_CTL, 0x00, 0x00},
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@ -222,26 +198,10 @@ void wsa881x_regmap_defaults(struct regmap *regmap, u8 version)
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return;
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}
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switch (version) {
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case WSA881X_1_X:
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regcache_cache_only(regmap, true);
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ret = regmap_multi_reg_write(regmap,
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wsa881x_rev_1_x,
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ARRAY_SIZE(wsa881x_rev_1_x));
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regcache_cache_only(regmap, false);
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break;
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case WSA881X_2_0:
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regcache_cache_only(regmap, true);
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ret = regmap_multi_reg_write(regmap,
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wsa881x_rev_2_0,
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ret = regmap_multi_reg_write(regmap, wsa881x_rev_2_0,
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ARRAY_SIZE(wsa881x_rev_2_0));
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regcache_cache_only(regmap, false);
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break;
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default:
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pr_debug("%s: unknown version", __func__);
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ret = -EINVAL;
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break;
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}
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if (ret)
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pr_debug("%s: Failed to update regmap defaults ret= %d\n",
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@ -177,12 +177,7 @@ static ssize_t wsa881x_codec_version_read(struct snd_info_entry *entry,
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return -EINVAL;
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}
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if (WSA881X_IS_2_0(wsa881x->version))
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len = snprintf(buffer, sizeof(buffer),
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"WSA881X-SOUNDWIRE_2_0\n");
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else
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len = snprintf(buffer, sizeof(buffer),
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"WSA881X-SOUNDWIRE_1_0\n");
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len = snprintf(buffer, sizeof(buffer), "WSA881X-SOUNDWIRE_2_0\n");
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return simple_read_from_buffer(buf, count, &pos, buffer, len);
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}
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@ -453,14 +448,9 @@ static int wsa881x_visense_txfe_ctrl(struct snd_soc_codec *codec, bool enable,
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__func__, enable, isense1_gain, isense2_gain, vsense_gain);
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if (enable) {
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if (WSA881X_IS_2_0(wsa881x->version))
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regmap_multi_reg_write(wsa881x->regmap,
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wsa881x_vi_txfe_en_2_0,
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ARRAY_SIZE(wsa881x_vi_txfe_en_2_0));
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else
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regmap_multi_reg_write(wsa881x->regmap,
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wsa881x_vi_txfe_en,
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ARRAY_SIZE(wsa881x_vi_txfe_en));
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} else {
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snd_soc_update_bits(codec, WSA881X_SPKR_PROT_FE_VSENSE_VCM,
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0x08, 0x08);
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@ -787,46 +777,18 @@ static int wsa881x_spkr_pa_event(struct snd_soc_dapm_widget *w,
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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snd_soc_update_bits(codec, WSA881X_SPKR_OCP_CTL, 0xC0, 0x80);
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if (WSA881X_IS_2_0(wsa881x->version))
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regmap_multi_reg_write(wsa881x->regmap,
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wsa881x_pre_pmu_pa_2_0,
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ARRAY_SIZE(wsa881x_pre_pmu_pa_2_0));
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else
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regmap_multi_reg_write(wsa881x->regmap,
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wsa881x_pre_pmu_pa,
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ARRAY_SIZE(wsa881x_pre_pmu_pa));
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break;
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case SND_SOC_DAPM_POST_PMU:
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if (WSA881X_IS_2_0(wsa881x->version)) {
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if (!wsa881x->comp_enable) {
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/*
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* 1ms delay is needed before change in gain
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* as per HW requirement.
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*/
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usleep_range(1000, 1010);
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wsa881x_ramp_pa_gain(codec, G_13P5DB, G_18DB,
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1000);
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}
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} else {
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/*
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* 710us delay is needed after PA enable as per
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* HW requirement.
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*/
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usleep_range(710, 720);
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regmap_multi_reg_write(wsa881x->regmap,
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wsa881x_post_pmu_pa,
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ARRAY_SIZE(wsa881x_post_pmu_pa));
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if (!wsa881x->comp_enable) {
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/*
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* 1ms delay is needed before change in gain
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* as per HW requirement.
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*/
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usleep_range(1000, 1010);
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wsa881x_ramp_pa_gain(codec, G_12DB, G_13P5DB,
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1000);
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}
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snd_soc_update_bits(codec, WSA881X_ADC_SEL_IBIAS,
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0x70, 0x40);
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wsa881x_ramp_pa_gain(codec, G_13P5DB, G_18DB, 1000);
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}
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if (wsa881x->visense_enable) {
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wsa881x_visense_txfe_ctrl(codec, ENABLE,
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@ -911,7 +873,6 @@ static void wsa881x_init(struct snd_soc_codec *codec)
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/* Bring out of digital reset */
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snd_soc_update_bits(codec, WSA881X_CDC_RST_CTL, 0x01, 0x01);
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if (WSA881X_IS_2_0(wsa881x->version)) {
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snd_soc_update_bits(codec, WSA881X_CLOCK_CONFIG, 0x10, 0x10);
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snd_soc_update_bits(codec, WSA881X_SPKR_OCP_CTL, 0x02, 0x02);
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snd_soc_update_bits(codec, WSA881X_SPKR_MISC_CTL1, 0xC0, 0x80);
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@ -943,27 +904,6 @@ static void wsa881x_init(struct snd_soc_codec *codec)
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0xFF, 0xB2);
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snd_soc_update_bits(codec, WSA881X_BONGO_RESRV_REG2,
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0xFF, 0x05);
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} else {
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/* Set DAC polarity to Rising */
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snd_soc_update_bits(codec, WSA881X_SPKR_DAC_CTL, 0x02, 0x02);
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/* set Bias Ref ctrl to 1.225V */
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snd_soc_update_bits(codec, WSA881X_BIAS_REF_CTRL, 0x07, 0x00);
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snd_soc_update_bits(codec, WSA881X_SPKR_BBM_CTL, 0x02, 0x02);
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snd_soc_update_bits(codec, WSA881X_SPKR_MISC_CTL1, 0xC0, 0x00);
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snd_soc_update_bits(codec, WSA881X_SPKR_MISC_CTL2, 0x07, 0x04);
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snd_soc_update_bits(codec, WSA881X_SPKR_BIAS_INT, 0x0F, 0x0F);
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snd_soc_update_bits(codec, WSA881X_SPKR_PA_INT, 0xF0, 0x10);
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snd_soc_update_bits(codec, WSA881X_SPKR_PA_INT, 0x0F, 0x0E);
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snd_soc_update_bits(codec, WSA881X_BOOST_PS_CTL, 0x80, 0x00);
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snd_soc_update_bits(codec, WSA881X_BOOST_PRESET_OUT1,
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0xF0, 0xB0);
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snd_soc_update_bits(codec, WSA881X_BOOST_PRESET_OUT2,
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0xF0, 0x30);
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snd_soc_update_bits(codec, WSA881X_SPKR_DRV_EN, 0x0F, 0x0C);
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snd_soc_update_bits(codec, WSA881X_BOOST_CURRENT_LIMIT,
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0x0F, 0x08);
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snd_soc_update_bits(codec, WSA881X_BOOST_ZX_CTL, 0x20, 0x00);
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}
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}
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static int32_t wsa881x_resource_acquire(struct snd_soc_codec *codec,
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@ -1003,17 +943,10 @@ static int32_t wsa881x_temp_reg_read(struct snd_soc_codec *codec,
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wsa881x_resource_acquire(codec, ENABLE);
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if (WSA881X_IS_2_0(wsa881x->version)) {
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snd_soc_update_bits(codec, WSA881X_TADC_VALUE_CTL, 0x01, 0x00);
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wsa_temp_reg->dmeas_msb = snd_soc_read(codec, WSA881X_TEMP_MSB);
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wsa_temp_reg->dmeas_lsb = snd_soc_read(codec, WSA881X_TEMP_LSB);
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snd_soc_update_bits(codec, WSA881X_TADC_VALUE_CTL, 0x01, 0x01);
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} else {
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wsa_temp_reg->dmeas_msb = snd_soc_read(codec,
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WSA881X_TEMP_DOUT_MSB);
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wsa_temp_reg->dmeas_lsb = snd_soc_read(codec,
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WSA881X_TEMP_DOUT_LSB);
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}
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wsa_temp_reg->d1_msb = snd_soc_read(codec, WSA881X_OTP_REG_1);
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wsa_temp_reg->d1_lsb = snd_soc_read(codec, WSA881X_OTP_REG_2);
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wsa_temp_reg->d2_msb = snd_soc_read(codec, WSA881X_OTP_REG_3);
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@ -1,4 +1,4 @@
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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -20,14 +20,6 @@
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#define WSA881X_MAX_SWR_PORTS 4
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enum {
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WSA881X_1_X = 0,
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WSA881X_2_0,
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};
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#define WSA881X_IS_2_0(ver) \
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((ver == WSA881X_2_0) ? 1 : 0)
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extern int wsa881x_set_channel_map(struct snd_soc_codec *codec, u8 *port,
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u8 num_port, unsigned int *ch_mask,
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unsigned int *ch_rate);
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