icnss: Remove hardware reset sequence

Remove WLAN hardware reset sequence from ICNSS platform as it
will be taken care by WLAN FW.

CRs-Fixed: 1089686
Change-Id: I363ee028eeb360ef998fd90c1ff94bb09c4ac8b4
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
Signed-off-by: Sarada Prasanna Garnayak <sgarna@codeaurora.org>

Documentation/devicetree/bindings/cnss/icnss.txt

@@ -12,17 +12,9 @@ Required properties:
   - reg-names: Names of the memory regions defined in reg entry
   - interrupts: Copy engine interrupt table
   - qcom,wlan-msa-memory: MSA memory size
-  - clocks: List of clock phandles
-  - clock-names: List of clock names corresponding to the "clocks" property
   - iommus: SMMUs and corresponding Stream IDs needed by WLAN
   - qcom,wlan-smmu-iova-address: I/O virtual address range as <start length>
     format to be used for allocations associated between WLAN and SMMU
-  - <supply-name>-supply: phandle to the regulator device tree node
-                          Required "supply-name" is "vdd-0.8-cx-mx".
-  - qcom,<supply>-config - specifies voltage levels for supply. Should be
-                           specified in pairs (min, max), units uV.  There can
-                           be optional load in uA and Regulator settle delay in
-                           uS.
 
 Optional properties:
   - qcom,icnss-vadc: VADC handle for vph_pwr read APIs.
@@ -34,8 +26,6 @@ Example:
         compatible = "qcom,icnss";
         reg = <0x0a000000 0x1000000>;
         reg-names = "membase";
-        clocks = <&clock_gcc clk_aggre2_noc_clk>;
-        clock-names = "smmu_aggre2_noc_clk";
         iommus = <&anoc2_smmu 0x1900>,
                  <&anoc2_smmu 0x1901>;
         qcom,wlan-smmu-iova-address = <0 0x10000000>;
@@ -53,6 +43,4 @@ Example:
 		   <0 140 0 /* CE10 */ >,
 		   <0 141 0 /* CE11 */ >;
         qcom,wlan-msa-memory = <0x200000>;
-	vdd-0.8-cx-mx-supply = <&pm8998_l5>;
-	qcom,vdd-0.8-cx-mx-config = <800000 800000 2400 1000>;
     };

arch/arm/boot/dts/qcom/msm8998.dtsi

@@ -2970,13 +2970,9 @@
 	 qcom,icnss@18800000 {
 		compatible = "qcom,icnss";
 		reg = <0x18800000 0x800000>,
-		      <0x10AC000 0x20>,
 		      <0xa0000000 0x10000000>,
 		      <0xb0000000 0x10000>;
-		reg-names = "membase", "mpm_config",
-			    "smmu_iova_base", "smmu_iova_ipa";
-		clocks = <&clock_gcc clk_rf_clk2_pin>;
-		clock-names = "cxo_ref_clk_pin";
+		reg-names = "membase", "smmu_iova_base", "smmu_iova_ipa";
 		iommus = <&anoc2_smmu 0x1900>,
 			 <&anoc2_smmu 0x1901>;
 		interrupts = <0 413 0 /* CE0 */ >,
@@ -2992,12 +2988,6 @@
 			     <0 424 0 /* CE10 */ >,
 			     <0 425 0 /* CE11 */ >;
 		qcom,wlan-msa-memory = <0x100000>;
-		vdd-0.8-cx-mx-supply = <&pm8998_l5>;
-		vdd-1.8-xo-supply = <&pm8998_l7_pin_ctrl>;
-		vdd-1.3-rfa-supply = <&pm8998_l17_pin_ctrl>;
-		vdd-3.3-ch0-supply = <&pm8998_l25_pin_ctrl>;
-		qcom,vdd-0.8-cx-mx-config = <800000 800000>;
-		qcom,vdd-3.3-ch0-config = <3104000 3312000>;
 		qcom,icnss-vadc = <&pm8998_vadc>;
 		qcom,icnss-adc_tm = <&pm8998_adc_tm>;
 	};