MIPS: mipsregs.h: Reindent CP0 Cause macros

Browse source

Reindent CP0 Cause macros for a single space after #define, leaving
extra indentation for individual Interrupt Pending bits as with CP0
Status register's Interrupt Mask bits.

[ralf@linux-mips.org: Fix conflict.]
[ralf@linux-mips.org: Fix indentation of the CAUSEB_FDCI and CAUSEF_FDCI
definitions.]

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9669/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

...

This commit is contained in:

Maciej W. Rozycki 2015-04-03 23:23:56 +01:00 • committed by Ralf Baechle

parent e08384cad8

commit 1054533a32

1 changed files with 16 additions and 16 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Show stats Download patch file Download diff file Expand all files Collapse all files