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drm/i915: Silence sparse complaints over insufficient bitfield int types.

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drivers/gpu/drm/i915/i915_drv.h|676 col 19| warning: dubious bitfield without explicit `signed' or `unsigned'
drivers/gpu/drm/i915/i915_drv.h|712 col 19| warning: dubious bitfield without explicit `signed' or `unsigned'

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Chris Wilson 2010-06-06 15:40:18 +01:00 • committed by Eric Anholt
parent 2dafb1e082
commit 11824e8c4e
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/i915/i915_drv.h
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@ -673,7 +673,7 @@ struct drm_i915_gem_object {
* *
* Size: 4 bits for 16 fences + sign (for FENCE_REG_NONE) * Size: 4 bits for 16 fences + sign (for FENCE_REG_NONE)
*/ */
int fence_reg : 5; signed int fence_reg : 5;
/** /**
* Used for checking the object doesn't appear more than once * Used for checking the object doesn't appear more than once
@ -709,7 +709,7 @@ struct drm_i915_gem_object {
* *
* In the worst case this is 1 + 1 + 1 + 2*2 = 7. That would fit into 3 * In the worst case this is 1 + 1 + 1 + 2*2 = 7. That would fit into 3
* bits with absolutely no headroom. So use 4 bits. */ * bits with absolutely no headroom. So use 4 bits. */
int pin_count : 4; unsigned int pin_count : 4;
#define DRM_I915_GEM_OBJECT_MAX_PIN_COUNT 0xf #define DRM_I915_GEM_OBJECT_MAX_PIN_COUNT 0xf
/** AGP memory structure for our GTT binding. */ /** AGP memory structure for our GTT binding. */