mmc: sdhci-msm: enable 64-bit ADMA

The SDHC controller capability was limited to 32-bit ADMA if
the system on chip supported only 32-bit address bus width,
eventhough the controller was 64-bit ADMA capable for potential
memory savings. Remove this limitation on systems that support
larger address bus width.

Change-Id: I79b296bc4dff015dac76036c231d197748aa03cb
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>

Documentation/devicetree/bindings/mmc/sdhci-msm.txt

@@ -72,6 +72,8 @@ In the following, <supply> can be vdd (flash core voltage) or vdd-io (I/O voltag
 	  all the cores in the little cluster.
 	  The default CPU affinity mode is PM_QOS_REQ_AFFINE_IRQ to maintain
 	  backward compatibility.
+	- qcom,large-address-bus - specifies whether the soc is capable of
+				 supporting larger than 32 bit address bus width.
 
 Example:
 
@@ -104,6 +106,7 @@ Example:
 
                 qcom,bus-width = <4>;
 		qcom,nonremovable;
+		qcom,large-address-bus;
 		qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
 
 		gpios = <&msmgpio 40 0>, /* CLK */

drivers/mmc/host/sdhci-msm.c

@@ -273,6 +273,7 @@ struct sdhci_msm_pltfm_data {
 	struct sdhci_msm_slot_reg_data *vreg_data;
 	bool nonremovable;
 	bool nonhotplug;
+	bool largeaddressbus;
 	bool pin_cfg_sts;
 	struct sdhci_msm_pin_data *pin_data;
 	struct sdhci_pinctrl_data *pctrl_data;
@@ -1588,6 +1589,9 @@ static struct sdhci_msm_pltfm_data *sdhci_msm_populate_pdata(struct device *dev)
 	if (of_get_property(np, "qcom,nonhotplug", NULL))
 		pdata->nonhotplug = true;
 
+	pdata->largeaddressbus =
+		of_property_read_bool(np, "qcom,large-address-bus");
+
 	sdhci_msm_populate_affinity_type(pdata, np);
 
 	return pdata;
@@ -2851,8 +2855,6 @@ static void sdhci_set_default_hw_caps(struct sdhci_msm_host *msm_host,
 			caps |= CORE_1_8V_SUPPORT;
 		if (msm_host->pdata->mmc_bus_width == MMC_CAP_8_BIT_DATA)
 			caps |= CORE_8_BIT_SUPPORT;
-		writel_relaxed(caps, host->ioaddr +
-				CORE_VENDOR_SPEC_CAPABILITIES0);
 	}
 
 	/*
@@ -2872,10 +2874,10 @@ static void sdhci_set_default_hw_caps(struct sdhci_msm_host *msm_host,
 	/*
 	 * Mask 64-bit support for controller with 32-bit address bus so that
 	 * smaller descriptor size will be used and improve memory consumption.
-	 * In case bus addressing ever changes, controller version should be
-	 * used in order to decide whether or not to mask 64-bit support.
 	 */
-	caps &= ~CORE_SYS_BUS_SUPPORT_64_BIT;
+	if (!msm_host->pdata->largeaddressbus)
+		caps &= ~CORE_SYS_BUS_SUPPORT_64_BIT;
+
 	writel_relaxed(caps, host->ioaddr + CORE_VENDOR_SPEC_CAPABILITIES0);
 	/* keep track of the value in SDHCI_CAPABILITIES */
 	msm_host->caps_0 = caps;