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devicetree: bindings: rtc: add bindings for xilinx zynqmp rtc

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adds file for description on device node bindings for RTC
found on Xilinx Zynq Ultrascale+ MPSoC.

Signed-off-by: Suneel Garapati <suneel.garapati@xilinx.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
This commit is contained in:
Suneel Garapati 2015-08-19 15:23:21 +05:30 • committed by Alexandre Belloni
parent a038c3aa9f
commit 12ece40d91
1 changed files with 25 additions and 0 deletions
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Documentation/devicetree/bindings/rtc/xlnx-rtc.txt Normal file
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* Xilinx Zynq Ultrascale+ MPSoC Real Time Clock
RTC controller for the Xilinx Zynq MPSoC Real Time Clock
Separate IRQ lines for seconds and alarm
Required properties:
- compatible: Should be "xlnx,zynqmp-rtc"
- reg: Physical base address of the controller and length
of memory mapped region.
- interrupts: IRQ lines for the RTC.
- interrupt-names: interrupt line names eg. "sec" "alarm"
Optional:
- calibration: calibration value for 1 sec period which will
be programmed directly to calibration register
Example:
rtc: rtc@ffa60000 {
compatible = "xlnx,zynqmp-rtc";
reg = <0x0 0xffa60000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 26 4>, <0 27 4>;
interrupt-names = "alarm", "sec";
calibration = <0x198233>;
};