evie/android_kernel_oneplus_msm8998
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msm: mdss: fix phy_io base for ldo_cntrl

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Due to wrong base io address, ldo_cntrl is not properly
configured. Fix this bug to get suspend/resume working.

Change-Id: I708d645f33a05a0bf8d68be0909c43fc628d293e
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
This commit is contained in:
Huaibin Yang 2014-12-18 18:46:20 -08:00 • committed by David Keitel
parent b6f20f1701
commit 13611e8bcf
1 changed files with 4 additions and 2 deletions
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6
drivers/video/fbdev/msm/msm_mdss_io_8974.c
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@ -330,7 +330,8 @@ static void mdss_dsi_20nm_phy_regulator_enable(struct mdss_dsi_ctrl_pdata
} }
if (pd->reg_ldo_mode) { if (pd->reg_ldo_mode) {
MIPI_OUTP(phy_io_base + MDSS_DSI_DSIPHY_LDO_CNTRL, 0x1d); MIPI_OUTP(ctrl_pdata->phy_io.base + MDSS_DSI_DSIPHY_LDO_CNTRL,
0x1d);
} else { } else {
MIPI_OUTP(phy_io_base + MDSS_DSI_DSIPHY_REGULATOR_CTRL_1, MIPI_OUTP(phy_io_base + MDSS_DSI_DSIPHY_REGULATOR_CTRL_1,
pd->regulator[1]); pd->regulator[1]);
@ -342,7 +343,8 @@ static void mdss_dsi_20nm_phy_regulator_enable(struct mdss_dsi_ctrl_pdata
pd->regulator[4]); pd->regulator[4]);
MIPI_OUTP(phy_io_base + MDSS_DSI_DSIPHY_REGULATOR_CAL_PWR_CFG, MIPI_OUTP(phy_io_base + MDSS_DSI_DSIPHY_REGULATOR_CAL_PWR_CFG,
pd->regulator[6]); pd->regulator[6]);
MIPI_OUTP(phy_io_base + MDSS_DSI_DSIPHY_LDO_CNTRL, 0x00); MIPI_OUTP(ctrl_pdata->phy_io.base + MDSS_DSI_DSIPHY_LDO_CNTRL,
0x00);
MIPI_OUTP(phy_io_base + MDSS_DSI_DSIPHY_REGULATOR_CTRL_0, MIPI_OUTP(phy_io_base + MDSS_DSI_DSIPHY_REGULATOR_CTRL_0,
pd->regulator[0]); pd->regulator[0]);
} }