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drm/nve0/fifo: runlist intr

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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2014-02-23 23:12:37 +10:00
parent c074bdbc92
commit 138b873fdf
1 changed files with 17 additions and 10 deletions
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27
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
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@ -60,6 +60,7 @@ static const struct {
struct nve0_fifo_engn { struct nve0_fifo_engn {
struct nouveau_gpuobj *runlist[2]; struct nouveau_gpuobj *runlist[2];
int cur_runlist; int cur_runlist;
wait_queue_head_t wait;
}; };
struct nve0_fifo_priv { struct nve0_fifo_priv {
@ -646,6 +647,18 @@ nve0_fifo_intr_pbdma(struct nve0_fifo_priv *priv, int unit)
nv_wr32(priv, 0x040108 + (unit * 0x2000), stat); nv_wr32(priv, 0x040108 + (unit * 0x2000), stat);
} }
static void
nve0_fifo_intr_runlist(struct nve0_fifo_priv *priv)
{
u32 mask = nv_rd32(priv, 0x002a00);
while (mask) {
u32 engn = __ffs(mask);
wake_up(&priv->engine[engn].wait);
nv_wr32(priv, 0x002a00, 1 << engn);
mask &= ~(1 << engn);
}
}
static void static void
nve0_fifo_intr_engine(struct nve0_fifo_priv *priv) nve0_fifo_intr_engine(struct nve0_fifo_priv *priv)
{ {
@ -731,14 +744,7 @@ nve0_fifo_intr(struct nouveau_subdev *subdev)
} }
if (stat & 0x40000000) { if (stat & 0x40000000) {
u32 mask = nv_mask(priv, 0x002a00, 0x00000000, 0x00000000); nve0_fifo_intr_runlist(priv);
while (mask) {
u32 engn = ffs(mask) - 1;
/* runlist event, not currently used */
mask &= ~(1 << engn);
}
stat &= ~0x40000000; stat &= ~0x40000000;
} }
@ -808,9 +814,8 @@ nve0_fifo_init(struct nouveau_object *object)
nv_wr32(priv, 0x002254, 0x10000000 | priv->user.bar.offset >> 12); nv_wr32(priv, 0x002254, 0x10000000 | priv->user.bar.offset >> 12);
nv_wr32(priv, 0x002a00, 0xffffffff);
nv_wr32(priv, 0x002100, 0xffffffff); nv_wr32(priv, 0x002100, 0xffffffff);
nv_wr32(priv, 0x002140, 0x3fffffff); nv_wr32(priv, 0x002140, 0x7fffffff);
return 0; return 0;
} }
@ -856,6 +861,8 @@ nve0_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
0, &priv->engine[i].runlist[1]); 0, &priv->engine[i].runlist[1]);
if (ret) if (ret)
return ret; return ret;
init_waitqueue_head(&priv->engine[i].wait);
} }
ret = nouveau_gpuobj_new(nv_object(priv), NULL, impl->channels * 0x200, ret = nouveau_gpuobj_new(nv_object(priv), NULL, impl->channels * 0x200,