evie/android_kernel_oneplus_msm8998
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

drm/i915: Refactor get_fence() to use the common fence writing routine

Browse source 
We can also take advantage of the new 'no retire' mode for seqno waiting
to avoid having to take a reference on the old fence object whilst
flushing an existing fence.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Chris Wilson 2012-04-17 15:31:33 +01:00 • committed by Daniel Vetter
parent ada726c734
commit 14415745b2
1 changed files with 27 additions and 43 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

54
drivers/gpu/drm/i915/i915_gem.c
View file

@ -2361,7 +2361,7 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj)
if (obj->last_fenced_seqno) { if (obj->last_fenced_seqno) {
ret = i915_wait_request(obj->ring, ret = i915_wait_request(obj->ring,
obj->last_fenced_seqno, obj->last_fenced_seqno,
true); false);
if (ret) if (ret)
return ret; return ret;
@ -2449,63 +2449,47 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj)
{ {
struct drm_device *dev = obj->base.dev; struct drm_device *dev = obj->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
bool enable = obj->tiling_mode != I915_TILING_NONE;
struct drm_i915_fence_reg *reg; struct drm_i915_fence_reg *reg;
int ret; int ret;
if (obj->tiling_mode == I915_TILING_NONE) /* Have we updated the tiling parameters upon the object and so
return i915_gem_object_put_fence(obj); * will need to serialise the write to the associated fence register?
*/
/* Just update our place in the LRU if our fence is getting reused. */
if (obj->fence_reg != I915_FENCE_REG_NONE) {
reg = &dev_priv->fence_regs[obj->fence_reg];
list_move_tail(&reg->lru_list, &dev_priv->mm.fence_list);
if (obj->tiling_changed) { if (obj->tiling_changed) {
ret = i915_gem_object_flush_fence(obj); ret = i915_gem_object_flush_fence(obj);
if (ret) if (ret)
return ret; return ret;
goto update;
} }
/* Just update our place in the LRU if our fence is getting reused. */
if (obj->fence_reg != I915_FENCE_REG_NONE) {
reg = &dev_priv->fence_regs[obj->fence_reg];
if (!obj->tiling_changed) {
list_move_tail(&reg->lru_list,
&dev_priv->mm.fence_list);
return 0; return 0;
} }
} else if (enable) {
reg = i915_find_fence_reg(dev); reg = i915_find_fence_reg(dev);
if (reg == NULL) if (reg == NULL)
return -EDEADLK; return -EDEADLK;
ret = i915_gem_object_flush_fence(obj);
if (ret)
return ret;
if (reg->obj) { if (reg->obj) {
struct drm_i915_gem_object *old = reg->obj; struct drm_i915_gem_object *old = reg->obj;
drm_gem_object_reference(&old->base);
if (old->tiling_mode)
i915_gem_release_mmap(old);
ret = i915_gem_object_flush_fence(old); ret = i915_gem_object_flush_fence(old);
if (ret) { if (ret)
drm_gem_object_unreference(&old->base);
return ret; return ret;
i915_gem_object_fence_lost(old);
} }
} else
return 0;
old->fence_reg = I915_FENCE_REG_NONE; i915_gem_object_update_fence(obj, reg, enable);
old->last_fenced_seqno = 0;
drm_gem_object_unreference(&old->base);
}
reg->obj = obj;
list_move_tail(&reg->lru_list, &dev_priv->mm.fence_list);
obj->fence_reg = reg - dev_priv->fence_regs;
update:
obj->tiling_changed = false; obj->tiling_changed = false;
i915_gem_write_fence(dev, reg - dev_priv->fence_regs, obj);
return 0; return 0;
} }