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ARM: dts: msm: Add v4l2 rotator node to msm8996

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Add mdss_rotator node with smmu subnodes.

Change mdss_mdp to interrupt controller so rotator can receive interrupt
routed by mdp handler.

Also, reserve control 4 and writeback 0/1 and their associated mixers
for v4l2 rotator driver.

CRs-Fixed: 1017182
Change-Id: I32f312f11fcbebbff0799120448d6e8f0d9ec98d
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
This commit is contained in:
Alan Kwong 2016-05-16 21:46:29 -04:00 • committed by Kyle Yan
parent 8da15ab2d0
commit 152fc477d3
1 changed files with 53 additions and 12 deletions
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65
arch/arm/boot/dts/qcom/msm8996-mdss.dtsi
View file

@ -18,6 +18,8 @@
<0x009b8000 0x1040>; <0x009b8000 0x1040>;
reg-names = "mdp_phys", "vbif_phys", "vbif_nrt_phys"; reg-names = "mdp_phys", "vbif_phys", "vbif_nrt_phys";
interrupts = <0 83 0>; interrupts = <0 83 0>;
interrupt-controller;
#interrupt-cells = <1>;
vdd-supply = <&gdsc_mdss>; vdd-supply = <&gdsc_mdss>;
#address-cells = <1>; #address-cells = <1>;
@ -87,14 +89,12 @@
qcom,mdss-pipe-cursor-clk-ctrl-offsets = <0x3A8 16 15>, qcom,mdss-pipe-cursor-clk-ctrl-offsets = <0x3A8 16 15>,
<0x3B0 16 15>; <0x3B0 16 15>;
qcom,mdss-ctl-off = <0x00002000 0x00002200 0x00002400 qcom,mdss-ctl-off = <0x00002000 0x00002200 0x00002400
0x00002600 0x00002800>; 0x00002600>;
qcom,mdss-mixer-intf-off = <0x00045000 0x00046000 qcom,mdss-mixer-intf-off = <0x00045000 0x00046000
0x00047000 0x0004A000>; 0x00047000 0x0004A000>;
qcom,mdss-mixer-wb-off = <0x00048000 0x00049000>;
qcom,mdss-dspp-off = <0x00055000 0x00057000>; qcom,mdss-dspp-off = <0x00055000 0x00057000>;
qcom,mdss-wb-off = <0x00065000 0x00065800 0x00066000>; qcom,mdss-wb-off = <0x00066000>;
qcom,mdss-intf-off = <0x0006B000 0x0006B800 qcom,mdss-intf-off = <0x0006B000 0x0006B800
0x0006C000 0x0006C800>; 0x0006C000 0x0006C800>;
qcom,mdss-pingpong-off = <0x00071000 0x00071800 qcom,mdss-pingpong-off = <0x00071000 0x00071800
@ -103,6 +103,7 @@
qcom,mdss-ppb-ctl-off = <0x00000330 0x00000338>; qcom,mdss-ppb-ctl-off = <0x00000330 0x00000338>;
qcom,mdss-ppb-cfg-off = <0x00000334 0x0000033C>; qcom,mdss-ppb-cfg-off = <0x00000334 0x0000033C>;
qcom,mdss-has-pingpong-split; qcom,mdss-has-pingpong-split;
qcom,mdss-has-separate-rotator;
qcom,mdss-ad-off = <0x0079000 0x00079800 0x0007a000>; qcom,mdss-ad-off = <0x0079000 0x00079800 0x0007a000>;
qcom,mdss-cdm-off = <0x0007a200>; qcom,mdss-cdm-off = <0x0007a200>;
@ -111,7 +112,6 @@
qcom,mdss-has-source-split; qcom,mdss-has-source-split;
qcom,mdss-highest-bank-bit = <0x2>; qcom,mdss-highest-bank-bit = <0x2>;
qcom,mdss-has-decimation; qcom,mdss-has-decimation;
qcom,mdss-has-rotator-downscale;
qcom,mdss-idle-power-collapse-enabled; qcom,mdss-idle-power-collapse-enabled;
clocks = <&clock_mmss clk_mdss_ahb_clk>, clocks = <&clock_mmss clk_mdss_ahb_clk>,
<&clock_mmss clk_mdss_axi_clk>, <&clock_mmss clk_mdss_axi_clk>,
@ -530,11 +530,15 @@
}; };
mdss_rotator: qcom,mdss_rotator { mdss_rotator: qcom,mdss_rotator {
compatible = "qcom,mdss_rotator"; compatible = "qcom,sde_rotator";
qcom,mdss-wb-count = <2>; reg = <0x00900000 0x90000>,
qcom,mdss-has-downscale; <0x009b8000 0x1040>;
qcom,mdss-has-ubwc; reg-names = "mdp_phys",
qcom,mdss-has-reg-bus; "rot_vbif_phys";
qcom,mdss-wb-count = <1>;
qcom,mdss-wb-id = <1>;
qcom,mdss-ctl-id = <4>;
qcom,mdss-highest-bank-bit = <0x2>;
/* Bus Scale Settings */ /* Bus Scale Settings */
qcom,msm-bus,name = "mdss_rotator"; qcom,msm-bus,name = "mdss_rotator";
qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-cases = <3>;
@ -550,7 +554,44 @@
qcom,supply-names = "rot-mmagic-mdss-gdsc", "rot-vdd"; qcom,supply-names = "rot-mmagic-mdss-gdsc", "rot-vdd";
clocks = <&clock_mmss clk_mmss_misc_ahb_clk>, clocks = <&clock_mmss clk_mmss_misc_ahb_clk>,
<&clock_mmss clk_mdss_rotator_vote_clk>; <&clock_mmss clk_mdss_rotator_vote_clk>,
clock-names = "iface_clk", "rot_core_clk"; <&clock_mmss clk_mdss_ahb_clk>,
<&clock_mmss clk_mdss_axi_clk>,
<&clock_mmss clk_mdp_clk_src>,
<&clock_mmss clk_mdss_mdp_vote_clk>;
clock-names = "iface_clk", "rot_core_clk",
"mdss_ahb_clk", "mdss_axi_clk", "mdp_clk_src",
"mdss_mdp_vote_clk";
interrupt-parent = <&mdss_mdp>;
interrupts = <32 0>;
/* VBIF QoS remapper settings*/
qcom,mdss-rot-vbif-qos-setting = <1 1 1 1>;
qcom,mdss-default-ot-rd-limit = <32>;
qcom,mdss-default-ot-wr-limit = <16>;
smmu_rot_unsecure: qcom,smmu_rot_unsec_cb {
compatible = "qcom,smmu_sde_rot_unsec";
iommus = <&rot_smmu 0>;
gdsc-mdss-supply = <&gdsc_mmagic_mdss>;
clocks = <&clock_mmss clk_smmu_rot_ahb_clk>,
<&clock_mmss clk_mmagic_mdss_axi_clk>,
<&clock_mmss clk_smmu_rot_axi_clk>;
clock-names = "rot_ahb_clk", "mmagic_mdss_axi_clk",
"rot_axi_clk";
};
smmu_rot_secure: qcom,smmu_rot_sec_cb {
compatible = "qcom,smmu_sde_rot_sec";
iommus = <&rot_smmu 1>;
gdsc-mdss-supply = <&gdsc_mmagic_mdss>;
clocks = <&clock_mmss clk_smmu_rot_ahb_clk>,
<&clock_mmss clk_mmagic_mdss_axi_clk>,
<&clock_mmss clk_smmu_rot_axi_clk>;
clock-names = "rot_ahb_clk", "mmagic_mdss_axi_clk",
"rot_axi_clk";
};
}; };
}; };