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IDE: Coding Style fixes to drivers/ide/pci/cy82c693.c

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Before:
total: 34 errors, 14 warnings, 456 lines checked

After:
total: 0 errors, 8 warnings, 456 lines checked

[bart: md5sum checked]

Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
Paolo Ciarrocchi 2008-04-26 17:36:42 +02:00 • committed by Bartlomiej Zolnierkiewicz
parent a2826190aa
commit 175f354b75
1 changed files with 37 additions and 37 deletions
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32
drivers/ide/pci/cy82c693.c
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@ -110,11 +110,11 @@ typedef struct pio_clocks_s {
* calc clocks using bus_speed * calc clocks using bus_speed
* returns (rounded up) time in bus clocks for time in ns * returns (rounded up) time in bus clocks for time in ns
*/ */
static int calc_clk (int time, int bus_speed) static int calc_clk(int time, int bus_speed)
{ {
int clocks; int clocks;
clocks = (time*bus_speed+999)/1000 -1; clocks = (time*bus_speed+999)/1000 - 1;
if (clocks < 0) if (clocks < 0)
clocks = 0; clocks = 0;
@ -133,7 +133,7 @@ static int calc_clk (int time, int bus_speed)
* for mode 3 and 4 drives 8 and 16-bit timings are the same * for mode 3 and 4 drives 8 and 16-bit timings are the same
* *
*/ */
static void compute_clocks (u8 pio, pio_clocks_t *p_pclk) static void compute_clocks(u8 pio, pio_clocks_t *p_pclk)
{ {
int clk1, clk2; int clk1, clk2;
int bus_speed = system_bus_clock(); /* get speed of PCI bus */ int bus_speed = system_bus_clock(); /* get speed of PCI bus */
@ -158,7 +158,7 @@ static void compute_clocks (u8 pio, pio_clocks_t *p_pclk)
clk1 = (clk1<<4)|clk2; /* combine active and recovery clocks */ clk1 = (clk1<<4)|clk2; /* combine active and recovery clocks */
/* note: we use the same values for 16bit IOR and IOW /* note: we use the same values for 16bit IOR and IOW
* those are all the same, since I don't have other * those are all the same, since I don't have other
* timings than those from ide-lib.c * timings than those from ide-lib.c
*/ */
@ -186,7 +186,7 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
outb(index, CY82_INDEX_PORT); outb(index, CY82_INDEX_PORT);
data = inb(CY82_DATA_PORT); data = inb(CY82_DATA_PORT);
printk (KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n", printk(KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n",
drive->name, HWIF(drive)->channel, drive->select.b.unit, drive->name, HWIF(drive)->channel, drive->select.b.unit,
(data&0x3), ((data>>2)&1)); (data&0x3), ((data>>2)&1));
#endif /* CY82C693_DEBUG_LOGS */ #endif /* CY82C693_DEBUG_LOGS */
@ -217,7 +217,7 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
outb(data, CY82_DATA_PORT); outb(data, CY82_DATA_PORT);
#if CY82C693_DEBUG_INFO #if CY82C693_DEBUG_INFO
printk (KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n", printk(KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n",
drive->name, data); drive->name, data);
#endif /* CY82C693_DEBUG_INFO */ #endif /* CY82C693_DEBUG_INFO */
} }
@ -243,13 +243,13 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
#if CY82C693_DEBUG_LOGS #if CY82C693_DEBUG_LOGS
/* for debug let's show the register values */ /* for debug let's show the register values */
if (drive->select.b.unit == 0) { if (drive->select.b.unit == 0) {
/* /*
* get master drive registers * get master drive registers
* address setup control register * address setup control register
* is 32 bit !!! * is 32 bit !!!
*/ */
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
addrCtrl &= 0x0F; addrCtrl &= 0x0F;
/* now let's get the remaining registers */ /* now let's get the remaining registers */
@ -348,15 +348,15 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c
#ifdef CY82C693_SETDMA_CLOCK #ifdef CY82C693_SETDMA_CLOCK
/* okay let's set the DMA clock speed */ /* okay let's set the DMA clock speed */
outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT);
data = inb(CY82_DATA_PORT); data = inb(CY82_DATA_PORT);
#if CY82C693_DEBUG_INFO #if CY82C693_DEBUG_INFO
printk(KERN_INFO "%s: Peripheral Configuration Register: 0x%X\n", printk(KERN_INFO "%s: Peripheral Configuration Register: 0x%X\n",
name, data); name, data);
#endif /* CY82C693_DEBUG_INFO */ #endif /* CY82C693_DEBUG_INFO */
/* /*
* for some reason sometimes the DMA controller * for some reason sometimes the DMA controller
* speed is set to ATCLK/2 ???? - we fix this here * speed is set to ATCLK/2 ???? - we fix this here
* *
@ -366,15 +366,15 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c
* *
* if anybody knows what goes wrong with my machine, please * if anybody knows what goes wrong with my machine, please
* let me know - ASK * let me know - ASK
*/ */
data |= 0x03; data |= 0x03;
outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT);
outb(data, CY82_DATA_PORT); outb(data, CY82_DATA_PORT);
#if CY82C693_DEBUG_INFO #if CY82C693_DEBUG_INFO
printk (KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n", printk(KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n",
name, data); name, data);
#endif /* CY82C693_DEBUG_INFO */ #endif /* CY82C693_DEBUG_INFO */
@ -423,7 +423,7 @@ static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_dev
/* CY82C693 is more than only a IDE controller. /* CY82C693 is more than only a IDE controller.
Function 1 is primary IDE channel, function 2 - secondary. */ Function 1 is primary IDE channel, function 2 - secondary. */
if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
PCI_FUNC(dev->devfn) == 1) { PCI_FUNC(dev->devfn) == 1) {
dev2 = pci_get_slot(dev->bus, dev->devfn + 1); dev2 = pci_get_slot(dev->bus, dev->devfn + 1);
ret = ide_setup_pci_devices(dev, dev2, &cy82c693_chipset); ret = ide_setup_pci_devices(dev, dev2, &cy82c693_chipset);