drm/nouveau/fifo/g84-: ack non-stall interrupt before handling it
Closes a very unlikely race that can occur if another NonStallInterrupt method passes between checking fences and acking the previous interrupt. With this change, the interrupt will re-fire under such conditions. Tested-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
eae7382bc5
commit
19a1082881
3 changed files with 4 additions and 4 deletions
|
@ -551,8 +551,8 @@ nv04_fifo_intr(struct nouveau_subdev *subdev)
|
||||||
}
|
}
|
||||||
|
|
||||||
if (status & 0x40000000) {
|
if (status & 0x40000000) {
|
||||||
nouveau_fifo_uevent(&priv->base);
|
|
||||||
nv_wr32(priv, 0x002100, 0x40000000);
|
nv_wr32(priv, 0x002100, 0x40000000);
|
||||||
|
nouveau_fifo_uevent(&priv->base);
|
||||||
status &= ~0x40000000;
|
status &= ~0x40000000;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -740,6 +740,8 @@ nvc0_fifo_intr_engine_unit(struct nvc0_fifo_priv *priv, int engn)
|
||||||
u32 inte = nv_rd32(priv, 0x002628);
|
u32 inte = nv_rd32(priv, 0x002628);
|
||||||
u32 unkn;
|
u32 unkn;
|
||||||
|
|
||||||
|
nv_wr32(priv, 0x0025a8 + (engn * 0x04), intr);
|
||||||
|
|
||||||
for (unkn = 0; unkn < 8; unkn++) {
|
for (unkn = 0; unkn < 8; unkn++) {
|
||||||
u32 ints = (intr >> (unkn * 0x04)) & inte;
|
u32 ints = (intr >> (unkn * 0x04)) & inte;
|
||||||
if (ints & 0x1) {
|
if (ints & 0x1) {
|
||||||
|
@ -751,8 +753,6 @@ nvc0_fifo_intr_engine_unit(struct nvc0_fifo_priv *priv, int engn)
|
||||||
nv_mask(priv, 0x002628, ints, 0);
|
nv_mask(priv, 0x002628, ints, 0);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
nv_wr32(priv, 0x0025a8 + (engn * 0x04), intr);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
|
|
|
@ -952,8 +952,8 @@ nve0_fifo_intr(struct nouveau_subdev *subdev)
|
||||||
}
|
}
|
||||||
|
|
||||||
if (stat & 0x80000000) {
|
if (stat & 0x80000000) {
|
||||||
nve0_fifo_intr_engine(priv);
|
|
||||||
nv_wr32(priv, 0x002100, 0x80000000);
|
nv_wr32(priv, 0x002100, 0x80000000);
|
||||||
|
nve0_fifo_intr_engine(priv);
|
||||||
stat &= ~0x80000000;
|
stat &= ~0x80000000;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Add table
Reference in a new issue