msm: mdss: dsi: reset phy during idle screen

Add reset of the phy pll when driver
exits idle screen. This fixes random
failures that were causing dsi commands
to fail after exit idle power collapse.

Change-Id: I0f6a53aef31c1c00f6d3cf1efceaa8211684412c
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
This commit is contained in:
Ingrid Gallardo 2017-03-22 15:18:44 -07:00
parent 15a311d026
commit 1a582ab50b
3 changed files with 45 additions and 2 deletions

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -115,4 +115,13 @@ int mdss_dsi_phy_v3_wait_for_lanes_stop_state(struct mdss_dsi_ctrl_pdata *ctrl,
* assumes that the link and core clocks are already on.
*/
int mdss_dsi_phy_v3_ulps_config(struct mdss_dsi_ctrl_pdata *ctrl, bool enable);
/**
* mdss_dsi_phy_v3_idle_pc_exit() - Called after Idle Power Collapse exit
* @ctrl: pointer to DSI controller structure
*
* This function is called after Idle Power Collapse, so driver
* can perform any sequence required after the Idle PC exit.
*/
void mdss_dsi_phy_v3_idle_pc_exit(struct mdss_dsi_ctrl_pdata *ctrl);
#endif /* MDSS_DSI_PHY_H */

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -327,6 +327,7 @@ int mdss_dsi_phy_v3_ulps_config(struct mdss_dsi_ctrl_pdata *ctrl, bool enable)
*/
DSI_PHY_W32(ctrl->phy_io.base, CMN_DSI_LANE_CTRL3,
active_lanes);
usleep_range(5, 15);
DSI_PHY_W32(ctrl->phy_io.base, CMN_DSI_LANE_CTRL3, 0);
@ -340,6 +341,20 @@ error:
return rc;
}
void mdss_dsi_phy_v3_idle_pc_exit(struct mdss_dsi_ctrl_pdata *ctrl)
{
u32 val = BIT(5);
u32 data;
/* Reset phy pll after idle pc exit */
data = DSI_PHY_R32(ctrl->phy_io.base, CMN_CTRL_1);
DSI_PHY_W32(ctrl->phy_io.base, CMN_CTRL_1, data | val);
usleep_range(10, 15);
data = DSI_PHY_R32(ctrl->phy_io.base, CMN_CTRL_1);
data &= ~(BIT(5));
DSI_PHY_W32(ctrl->phy_io.base, CMN_CTRL_1, data);
}
int mdss_dsi_phy_v3_shutdown(struct mdss_dsi_ctrl_pdata *ctrl)
{

View file

@ -1969,6 +1969,20 @@ error:
return ret;
}
/**
* mdss_dsi_phy_idle_pc_exit() - Called after exit Idle PC
* @ctrl: pointer to DSI controller structure
*
* Perform any programming needed after Idle PC exit.
*/
static int mdss_dsi_phy_idle_pc_exit(struct mdss_dsi_ctrl_pdata *ctrl)
{
if (ctrl->shared_data->phy_rev == DSI_PHY_REV_30)
mdss_dsi_phy_v3_idle_pc_exit(ctrl);
return 0;
}
/**
* mdss_dsi_clamp_ctrl_default() - Program DSI clamps
* @ctrl: pointer to DSI controller structure
@ -2486,5 +2500,10 @@ int mdss_dsi_pre_clkon_cb(void *priv,
}
}
if ((clk_type & MDSS_DSI_LINK_CLK) &&
(new_state == MDSS_DSI_CLK_ON) &&
!ctrl->panel_data.panel_info.cont_splash_enabled)
mdss_dsi_phy_idle_pc_exit(ctrl);
return rc;
}