edac: cortex: Update the error strings to reflect Kryo2xx processor

Update the single and double bit error strings to reflect the Kryo2xx
silver and gold processors.

CRs-Fixed: 1020529
Change-Id: Ia4f54bfee8111f9f039f772a8bcc7c9a0400d5aa
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
This commit is contained in:
Trilok Soni 2016-05-24 13:55:43 -07:00 committed by Kyle Yan
parent dbe16a2725
commit 1acab1571a

View file

@ -95,6 +95,12 @@
#define A57_L2_UE 7
#define L2_EXT_UE 8
#define CCI_UE 9
#define KRYO2XX_SILVER_L1_CE 10
#define KRYO2XX_SILVER_L1_UE 11
#define KRYO2XX_SILVER_L2_CE 12
#define KRYO2XX_SILVER_L2_UE 13
#define KRYO2XX_GOLD_L2_CE 14
#define KRYO2XX_GOLD_L2_UE 15
#ifdef CONFIG_EDAC_CORTEX_ARM64_PANIC_ON_UE
#define ARM64_ERP_PANIC_ON_UE 1
@ -157,6 +163,12 @@ static const struct errors_edac errors[] = {
{"A57 L2 Uncorrectable Error", edac_device_handle_ue },
{"L2 External Error", edac_device_handle_ue },
{"CCI Error", edac_device_handle_ue },
{"Kryo2xx Silver L1 Correctable Error", edac_device_handle_ce },
{"Kryo2xx Silver L1 Uncorrectable Error", edac_device_handle_ue },
{"Kryo2xx Silver L2 Correctable Error", edac_device_handle_ce },
{"Kryo2xx Silver L2 Uncorrectable Error", edac_device_handle_ue },
{"Kryo2xx Gold L2 Correctable Error", edac_device_handle_ce },
{"Kryo2xx Gold L2 Uncorrectable Error", edac_device_handle_ue },
};
#define read_l2merrsr_el1 ({ \
@ -317,11 +329,11 @@ static void ca53_parse_cpumerrsr(struct erp_local_data *ed)
(int) A53_CPUMERRSR_OTHER(cpumerrsr));
if (ed->err == SBE)
errors[A53_L1_CE].func(ed->drv->edev_ctl, smp_processor_id(),
L1_CACHE, errors[A53_L1_CE].msg);
errors[KRYO2XX_SILVER_L1_CE].func(ed->drv->edev_ctl, smp_processor_id(),
L1_CACHE, errors[KRYO2XX_SILVER_L1_CE].msg);
else if (ed->err == DBE)
errors[A53_L1_UE].func(ed->drv->edev_ctl, smp_processor_id(),
L1_CACHE, errors[A53_L1_UE].msg);
errors[KRYO2XX_SILVER_L1_UE].func(ed->drv->edev_ctl, smp_processor_id(),
L1_CACHE, errors[KRYO2XX_SILVER_L1_UE].msg);
write_cpumerrsr_el1(0);
}
@ -375,11 +387,11 @@ static void ca53_parse_l2merrsr(struct erp_local_data *ed)
(int) A53_L2MERRSR_OTHER(l2merrsr));
if (ed->err == SBE)
errors[A53_L2_CE].func(ed->drv->edev_ctl, smp_processor_id(),
L2_CACHE, errors[A53_L2_CE].msg);
errors[KRYO2XX_SILVER_L2_CE].func(ed->drv->edev_ctl, smp_processor_id(),
L2_CACHE, errors[KRYO2XX_SILVER_L2_CE].msg);
else if (ed->err == DBE)
errors[A53_L2_UE].func(ed->drv->edev_ctl, smp_processor_id(),
L2_CACHE, errors[A53_L2_UE].msg);
errors[KRYO2XX_SILVER_L2_UE].func(ed->drv->edev_ctl, smp_processor_id(),
L2_CACHE, errors[KRYO2XX_SILVER_L2_UE].msg);
write_l2merrsr_el1(0);
}
@ -530,7 +542,7 @@ static void kryo2xx_gold_parse_l2merrsr(struct erp_local_data *ed)
if (KRYO2XX_GOLD_L2MERRSR_FATAL(l2merrsr))
ed->err = DBE;
edac_printk(KERN_CRIT, EDAC_CPU, "Gold L2 %s Error detected\n",
edac_printk(KERN_CRIT, EDAC_CPU, "Kryo2xx Gold L2 %s Error detected\n",
err_name[ed->err]);
kryo2xx_gold_print_error_state_regs();
if (ed->err == DBE)
@ -551,11 +563,11 @@ static void kryo2xx_gold_parse_l2merrsr(struct erp_local_data *ed)
(int) KRYO2XX_GOLD_L2MERRSR_OTHER(l2merrsr));
if (ed->err == SBE) {
errors[A57_L2_CE].func(ed->drv->edev_ctl, smp_processor_id(),
L2_CACHE, errors[A57_L2_CE].msg);
errors[KRYO2XX_GOLD_L2_CE].func(ed->drv->edev_ctl, smp_processor_id(),
L2_CACHE, errors[KRYO2XX_GOLD_L2_CE].msg);
} else if (ed->err == DBE) {
errors[A57_L2_UE].func(ed->drv->edev_ctl, smp_processor_id(),
L2_CACHE, errors[A57_L2_UE].msg);
errors[KRYO2XX_GOLD_L2_UE].func(ed->drv->edev_ctl, smp_processor_id(),
L2_CACHE, errors[KRYO2XX_GOLD_L2_UE].msg);
}
write_l2merrsr_el1(0);
}