Merge "ASoC: msm: q6dspv2: add adm channel config support"
This commit is contained in:
commit
1befb076f5
3 changed files with 255 additions and 136 deletions
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@ -174,7 +174,7 @@ static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
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static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
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"KHZ_32", "KHZ_44P1", "KHZ_48",
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"KHZ_96", "KHZ_192"};
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static char const *bt_sco_sample_rate_text[] = {"KHZ_8", "KHZ_16"};
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static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_48"};
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static const char *const usb_ch_text[] = {"One", "Two"};
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static char const *ch_text[] = {"Two", "Three", "Four", "Five",
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"Six", "Seven", "Eight"};
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@ -206,7 +206,7 @@ static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
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static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
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static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
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static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
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static SOC_ENUM_SINGLE_EXT_DECL(bt_sco_sample_rate, bt_sco_sample_rate_text);
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static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
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static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
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static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
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static SOC_ENUM_SINGLE_EXT_DECL(hdmi_rx_sample_rate, hdmi_rx_sample_rate_text);
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@ -611,29 +611,44 @@ static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
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return 1;
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}
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static int msm_bt_sco_sample_rate_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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/*
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* Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
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* when used for BT_SCO use case. Return either Rx or Tx sample rate
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* value.
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*/
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ucontrol->value.integer.value[0] = slim_rx_cfg[SLIM_RX_7].sample_rate;
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switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
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case SAMPLING_RATE_48KHZ:
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ucontrol->value.integer.value[0] = 2;
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break;
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case SAMPLING_RATE_16KHZ:
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ucontrol->value.integer.value[0] = 1;
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break;
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case SAMPLING_RATE_8KHZ:
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default:
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ucontrol->value.integer.value[0] = 0;
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break;
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}
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pr_debug("%s: sample rate = %d", __func__,
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slim_rx_cfg[SLIM_RX_7].sample_rate);
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return 0;
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}
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static int msm_bt_sco_sample_rate_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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switch (ucontrol->value.integer.value[0]) {
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case 1:
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slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
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slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
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break;
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case 2:
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slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
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slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
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break;
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case 0:
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default:
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slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
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@ -1134,9 +1149,9 @@ static const struct snd_kcontrol_new msm_snd_controls[] = {
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slim_rx_sample_rate_get, slim_rx_sample_rate_put),
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SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
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slim_rx_sample_rate_get, slim_rx_sample_rate_put),
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SOC_ENUM_EXT("BT_SCO SampleRate", bt_sco_sample_rate,
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msm_bt_sco_sample_rate_get,
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msm_bt_sco_sample_rate_put),
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SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
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msm_bt_sample_rate_get,
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msm_bt_sample_rate_put),
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SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
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usb_audio_rx_sample_rate_get,
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usb_audio_rx_sample_rate_put),
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@ -1341,6 +1356,8 @@ static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
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break;
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case MSM_BACKEND_DAI_SLIMBUS_7_RX:
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param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
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slim_rx_cfg[SLIM_RX_7].bit_format);
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rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
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channels->min = channels->max =
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slim_rx_cfg[SLIM_RX_7].channels;
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@ -3131,7 +3148,11 @@ static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
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.cpu_dai_name = "msm-dai-q6-dev.16398",
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.platform_name = "msm-pcm-routing",
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.codec_name = "btfmslim_slave",
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.codec_dai_name = "btfm_bt_sco_slim_rx",
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/* BT codec driver determines capabilities based on
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* dai name, bt codecdai name should always contains
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* supported usecase information
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*/
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.codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
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.no_pcm = 1,
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.dpcm_playback = 1,
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.be_id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
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@ -244,205 +244,209 @@ static void msm_pcm_routng_cfg_matrix_map_pp(struct route_payload payload,
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#define SLIMBUS_EXTPROC_RX AFE_PORT_INVALID
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struct msm_pcm_routing_bdai_data msm_bedais[MSM_BACKEND_DAI_MAX] = {
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{ PRIMARY_I2S_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_PRI_I2S_RX},
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{ PRIMARY_I2S_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_PRI_I2S_TX},
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{ SLIMBUS_0_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_0_RX},
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{ SLIMBUS_0_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_0_TX},
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{ HDMI_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_HDMI},
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{ INT_BT_SCO_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INT_BT_SCO_RX},
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{ INT_BT_SCO_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INT_BT_SCO_TX},
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{ INT_FM_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INT_FM_RX},
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{ INT_FM_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INT_FM_TX},
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{ RT_PROXY_PORT_001_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_AFE_PCM_RX},
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{ RT_PROXY_PORT_001_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_AFE_PCM_TX},
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{ AFE_PORT_ID_PRIMARY_PCM_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_AUXPCM_RX},
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{ AFE_PORT_ID_PRIMARY_PCM_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_AUXPCM_TX},
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{ VOICE_PLAYBACK_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_VOICE_PLAYBACK_TX},
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{ VOICE2_PLAYBACK_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_VOICE2_PLAYBACK_TX},
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{ VOICE_RECORD_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INCALL_RECORD_RX},
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{ VOICE_RECORD_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INCALL_RECORD_TX},
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{ MI2S_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_MI2S_RX},
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{ MI2S_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_MI2S_TX},
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{ SECONDARY_I2S_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SEC_I2S_RX},
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{ SLIMBUS_1_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_1_RX},
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{ SLIMBUS_1_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_1_TX},
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{ SLIMBUS_4_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_4_RX},
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{ SLIMBUS_4_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_4_TX},
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{ SLIMBUS_3_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_3_RX},
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{ SLIMBUS_3_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_3_TX},
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{ SLIMBUS_5_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_5_TX},
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{ SLIMBUS_EXTPROC_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_STUB_RX},
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{ SLIMBUS_EXTPROC_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_STUB_TX},
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{ SLIMBUS_EXTPROC_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_STUB_1_TX},
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{ AFE_PORT_ID_QUATERNARY_MI2S_RX, 0, 0, 0, 0, 0, 0, 0,
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{ PRIMARY_I2S_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_PRI_I2S_RX},
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{ PRIMARY_I2S_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_PRI_I2S_TX},
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{ SLIMBUS_0_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_0_RX},
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{ SLIMBUS_0_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_0_TX},
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{ HDMI_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_HDMI},
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{ INT_BT_SCO_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INT_BT_SCO_RX},
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{ INT_BT_SCO_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INT_BT_SCO_TX},
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{ INT_FM_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INT_FM_RX},
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{ INT_FM_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INT_FM_TX},
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{ RT_PROXY_PORT_001_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_AFE_PCM_RX},
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{ RT_PROXY_PORT_001_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_AFE_PCM_TX},
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{ AFE_PORT_ID_PRIMARY_PCM_RX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_AUXPCM_RX},
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{ AFE_PORT_ID_PRIMARY_PCM_TX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_AUXPCM_TX},
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{ VOICE_PLAYBACK_TX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_VOICE_PLAYBACK_TX},
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{ VOICE2_PLAYBACK_TX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_VOICE2_PLAYBACK_TX},
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{ VOICE_RECORD_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INCALL_RECORD_RX},
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{ VOICE_RECORD_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INCALL_RECORD_TX},
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{ MI2S_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_MI2S_RX},
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{ MI2S_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_MI2S_TX},
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{ SECONDARY_I2S_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SEC_I2S_RX},
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{ SLIMBUS_1_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_1_RX},
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{ SLIMBUS_1_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_1_TX},
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{ SLIMBUS_4_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_4_RX},
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{ SLIMBUS_4_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_4_TX},
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{ SLIMBUS_3_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_3_RX},
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{ SLIMBUS_3_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_3_TX},
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{ SLIMBUS_5_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_5_TX},
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{ SLIMBUS_EXTPROC_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_STUB_RX},
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{ SLIMBUS_EXTPROC_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_STUB_TX},
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{ SLIMBUS_EXTPROC_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_STUB_1_TX},
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{ AFE_PORT_ID_QUATERNARY_MI2S_RX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_QUAT_MI2S_RX},
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{ AFE_PORT_ID_QUATERNARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_QUATERNARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_QUAT_MI2S_TX},
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{ AFE_PORT_ID_SECONDARY_MI2S_RX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_SECONDARY_MI2S_RX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_SEC_MI2S_RX},
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{ AFE_PORT_ID_SECONDARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_SECONDARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_SEC_MI2S_TX},
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{ AFE_PORT_ID_PRIMARY_MI2S_RX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_PRIMARY_MI2S_RX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_PRI_MI2S_RX},
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{ AFE_PORT_ID_PRIMARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_PRIMARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_PRI_MI2S_TX},
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{ AFE_PORT_ID_TERTIARY_MI2S_RX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_TERTIARY_MI2S_RX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_TERT_MI2S_RX},
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{ AFE_PORT_ID_TERTIARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_TERTIARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_TERT_MI2S_TX},
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{ AUDIO_PORT_ID_I2S_RX, 0, 0, 0, 0, 0, 0, 0,
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{ AUDIO_PORT_ID_I2S_RX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_AUDIO_I2S_RX},
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{ AFE_PORT_ID_SECONDARY_PCM_RX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_SECONDARY_PCM_RX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_SEC_AUXPCM_RX},
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{ AFE_PORT_ID_SECONDARY_PCM_TX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_SECONDARY_PCM_TX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_SEC_AUXPCM_TX},
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{ SLIMBUS_6_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_6_RX},
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{ SLIMBUS_6_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_6_TX},
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{ AFE_PORT_ID_SPDIF_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SPDIF_RX},
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{ AFE_PORT_ID_SECONDARY_MI2S_RX_SD1, 0, 0, 0, 0, 0, 0, 0,
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{ SLIMBUS_6_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_6_RX},
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{ SLIMBUS_6_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_6_TX},
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{ AFE_PORT_ID_SPDIF_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SPDIF_RX},
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{ AFE_PORT_ID_SECONDARY_MI2S_RX_SD1, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_SEC_MI2S_RX_SD1},
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{ SLIMBUS_5_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_5_RX},
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{ AFE_PORT_ID_QUINARY_MI2S_RX, 0, 0, 0, 0, 0, 0, 0,
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{ SLIMBUS_5_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_5_RX},
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{ AFE_PORT_ID_QUINARY_MI2S_RX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_QUIN_MI2S_RX},
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{ AFE_PORT_ID_QUINARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_QUINARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_QUIN_MI2S_TX},
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{ AFE_PORT_ID_SENARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_SENARY_MI2S_TX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_SENARY_MI2S_TX},
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{ AFE_PORT_ID_PRIMARY_TDM_RX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_PRIMARY_TDM_RX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_PRI_TDM_RX_0},
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{ AFE_PORT_ID_PRIMARY_TDM_TX, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_PRIMARY_TDM_TX, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_PRI_TDM_TX_0},
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{ AFE_PORT_ID_PRIMARY_TDM_RX_1, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_PRIMARY_TDM_RX_1, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_PRI_TDM_RX_1},
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{ AFE_PORT_ID_PRIMARY_TDM_TX_1, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_PRIMARY_TDM_TX_1, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_PRI_TDM_TX_1},
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{ AFE_PORT_ID_PRIMARY_TDM_RX_2, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_PRIMARY_TDM_RX_2, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_PRI_TDM_RX_2},
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{ AFE_PORT_ID_PRIMARY_TDM_TX_2, 0, 0, 0, 0, 0, 0, 0,
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{ AFE_PORT_ID_PRIMARY_TDM_TX_2, 0, 0, 0, 0, 0, 0, 0, 0,
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LPASS_BE_PRI_TDM_TX_2},
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_RX_3, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_RX_3, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_PRI_TDM_RX_3},
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_TX_3, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_TX_3, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_PRI_TDM_TX_3},
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_RX_4, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_RX_4, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_PRI_TDM_RX_4},
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_TX_4, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_TX_4, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_PRI_TDM_TX_4},
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_RX_5, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_RX_5, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_PRI_TDM_RX_5},
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_TX_5, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_TX_5, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_PRI_TDM_TX_5},
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_RX_6, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_RX_6, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_PRI_TDM_RX_6},
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_TX_6, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_TX_6, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_PRI_TDM_TX_6},
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_RX_7, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_RX_7, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_PRI_TDM_RX_7},
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_TX_7, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_PRIMARY_TDM_TX_7, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_PRI_TDM_TX_7},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_RX_0},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_TX_0},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_1, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_1, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_RX_1},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_1, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_1, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_TX_1},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_2, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_2, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_RX_2},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_2, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_2, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_TX_2},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_3, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_3, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_RX_3},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_3, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_3, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_TX_3},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_4, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_4, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_RX_4},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_4, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_4, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_TX_4},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_5, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_5, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_RX_5},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_5, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_5, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_TX_5},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_6, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_6, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_RX_6},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_6, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_6, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_TX_6},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_7, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_RX_7, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_RX_7},
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_7, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_SECONDARY_TDM_TX_7, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_SEC_TDM_TX_7},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_RX_0},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_TX_0},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_1, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_1, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_RX_1},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_1, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_1, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_TX_1},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_2, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_2, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_RX_2},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_2, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_2, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_TX_2},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_3, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_3, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_RX_3},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_3, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_3, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_TX_3},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_4, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_4, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_RX_4},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_4, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_4, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_TX_4},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_5, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_5, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_RX_5},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_5, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_5, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_TX_5},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_6, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_6, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_RX_6},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_6, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_6, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_TX_6},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_7, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_RX_7, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_RX_7},
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_7, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_TERTIARY_TDM_TX_7, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_TERT_TDM_TX_7},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_RX_0},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_TX_0},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_1, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_1, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_RX_1},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_1, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_1, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_TX_1},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_2, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_2, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_RX_2},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_2, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_2, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_TX_2},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_3, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_3, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_RX_3},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_3, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_3, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_TX_3},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_4, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_4, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_RX_4},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_4, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_4, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_TX_4},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_5, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_5, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_RX_5},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_5, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_5, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_TX_5},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_6, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_6, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_RX_6},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_6, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_6, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_TX_6},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_7, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_RX_7, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_RX_7},
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_7, 0, 0, 0, 0, 0, 0, 0,
|
||||
{ AFE_PORT_ID_QUATERNARY_TDM_TX_7, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
LPASS_BE_QUAT_TDM_TX_7},
|
||||
{ INT_BT_A2DP_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INT_BT_A2DP_RX},
|
||||
{ SLIMBUS_7_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_7_RX},
|
||||
{ SLIMBUS_7_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_7_TX},
|
||||
{ SLIMBUS_8_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_8_RX},
|
||||
{ SLIMBUS_8_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_8_TX},
|
||||
{ AFE_PORT_ID_USB_RX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_USB_AUDIO_RX},
|
||||
{ AFE_PORT_ID_USB_TX, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_USB_AUDIO_TX},
|
||||
{ INT_BT_A2DP_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_INT_BT_A2DP_RX},
|
||||
{ SLIMBUS_7_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_7_RX},
|
||||
{ SLIMBUS_7_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_7_TX},
|
||||
{ SLIMBUS_8_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_8_RX},
|
||||
{ SLIMBUS_8_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_SLIMBUS_8_TX},
|
||||
{ AFE_PORT_ID_USB_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_USB_AUDIO_RX},
|
||||
{ AFE_PORT_ID_USB_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_USB_AUDIO_TX},
|
||||
};
|
||||
|
||||
/* Track ASM playback & capture sessions of DAI */
|
||||
|
@ -828,7 +832,15 @@ int msm_pcm_routing_reg_phy_compr_stream(int fe_id, int perf_mode,
|
|||
(msm_bedais[i].active) &&
|
||||
(test_bit(fe_id, &msm_bedais[i].fe_sessions))) {
|
||||
int app_type, app_type_idx, copp_idx, acdb_dev_id;
|
||||
channels = msm_bedais[i].channel;
|
||||
|
||||
/*
|
||||
* check if ADM needs to be configured with different
|
||||
* channel mapping than backend
|
||||
*/
|
||||
if (!msm_bedais[i].adm_override_ch)
|
||||
channels = msm_bedais[i].channel;
|
||||
else
|
||||
channels = msm_bedais[i].adm_override_ch;
|
||||
|
||||
bit_width = msm_routing_get_bit_width(
|
||||
msm_bedais[i].format);
|
||||
|
@ -976,7 +988,14 @@ int msm_pcm_routing_reg_phy_stream(int fedai_id, int perf_mode,
|
|||
(msm_bedais[i].active) &&
|
||||
(test_bit(fedai_id, &msm_bedais[i].fe_sessions))) {
|
||||
int app_type, app_type_idx, copp_idx, acdb_dev_id;
|
||||
channels = msm_bedais[i].channel;
|
||||
/*
|
||||
* check if ADM needs to be configured with different
|
||||
* channel mapping than backend
|
||||
*/
|
||||
if (!msm_bedais[i].adm_override_ch)
|
||||
channels = msm_bedais[i].channel;
|
||||
else
|
||||
channels = msm_bedais[i].adm_override_ch;
|
||||
msm_bedais[i].compr_passthr_mode =
|
||||
LEGACY_PCM;
|
||||
|
||||
|
@ -1188,7 +1207,14 @@ static void msm_pcm_routing_process_audio(u16 reg, u16 val, int set)
|
|||
if (msm_bedais[reg].active && fdai->strm_id !=
|
||||
INVALID_SESSION) {
|
||||
int app_type, app_type_idx, copp_idx, acdb_dev_id;
|
||||
channels = msm_bedais[reg].channel;
|
||||
/*
|
||||
* check if ADM needs to be configured with different
|
||||
* channel mapping than backend
|
||||
*/
|
||||
if (!msm_bedais[reg].adm_override_ch)
|
||||
channels = msm_bedais[reg].channel;
|
||||
else
|
||||
channels = msm_bedais[reg].adm_override_ch;
|
||||
if (session_type == SESSION_TYPE_TX &&
|
||||
fdai->be_srate &&
|
||||
(fdai->be_srate != msm_bedais[reg].sample_rate)) {
|
||||
|
@ -1855,6 +1881,68 @@ static int msm_routing_lsm_func_put(struct snd_kcontrol *kcontrol,
|
|||
return afe_port_set_mad_type(port_id, mad_type);
|
||||
}
|
||||
|
||||
static const char *const adm_override_chs_text[] = {"Zero", "One", "Two"};
|
||||
|
||||
static SOC_ENUM_SINGLE_EXT_DECL(slim_7_rx_adm_override_chs,
|
||||
adm_override_chs_text);
|
||||
|
||||
static int msm_routing_adm_get_backend_idx(struct snd_kcontrol *kcontrol)
|
||||
{
|
||||
int backend_id;
|
||||
|
||||
if (strnstr(kcontrol->id.name, "SLIM7_RX", sizeof("SLIM7_RX"))) {
|
||||
backend_id = MSM_BACKEND_DAI_SLIMBUS_7_RX;
|
||||
} else {
|
||||
pr_err("%s: unsupported backend id: %s",
|
||||
__func__, kcontrol->id.name);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return backend_id;
|
||||
}
|
||||
static int msm_routing_adm_channel_config_get(
|
||||
struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
int backend_id = msm_routing_adm_get_backend_idx(kcontrol);
|
||||
|
||||
if (backend_id >= 0) {
|
||||
mutex_lock(&routing_lock);
|
||||
ucontrol->value.integer.value[0] =
|
||||
msm_bedais[backend_id].adm_override_ch;
|
||||
pr_debug("%s: adm channel count %ld for BE:%d\n", __func__,
|
||||
ucontrol->value.integer.value[0], backend_id);
|
||||
mutex_unlock(&routing_lock);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int msm_routing_adm_channel_config_put(
|
||||
struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
int backend_id = msm_routing_adm_get_backend_idx(kcontrol);
|
||||
|
||||
if (backend_id >= 0) {
|
||||
mutex_lock(&routing_lock);
|
||||
msm_bedais[backend_id].adm_override_ch =
|
||||
ucontrol->value.integer.value[0];
|
||||
pr_debug("%s:updating BE :%d adm channels: %d\n",
|
||||
__func__, backend_id,
|
||||
msm_bedais[backend_id].adm_override_ch);
|
||||
mutex_unlock(&routing_lock);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct snd_kcontrol_new adm_channel_config_controls[] = {
|
||||
SOC_ENUM_EXT("SLIM7_RX ADM Channels", slim_7_rx_adm_override_chs,
|
||||
msm_routing_adm_channel_config_get,
|
||||
msm_routing_adm_channel_config_put),
|
||||
};
|
||||
|
||||
static int msm_routing_slim_0_rx_aanc_mux_get(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
|
@ -9641,7 +9729,14 @@ static int msm_pcm_routing_prepare(struct snd_pcm_substream *substream)
|
|||
app_type_cfg[app_type_idx].bit_width;
|
||||
} else
|
||||
sample_rate = bedai->sample_rate;
|
||||
channels = bedai->channel;
|
||||
/*
|
||||
* check if ADM needs to be configured with different
|
||||
* channel mapping than backend
|
||||
*/
|
||||
if (!bedai->adm_override_ch)
|
||||
channels = bedai->channel;
|
||||
else
|
||||
channels = bedai->adm_override_ch;
|
||||
acdb_dev_id = fe_dai_app_type_cfg[i].acdb_dev_id;
|
||||
topology = msm_routing_get_adm_topology(path_type, i);
|
||||
copp_idx = adm_open(bedai->port_id, path_type,
|
||||
|
@ -9919,7 +10014,9 @@ static int msm_routing_probe(struct snd_soc_platform *platform)
|
|||
msm_dts_eagle_add_controls(platform);
|
||||
|
||||
snd_soc_add_platform_controls(platform, msm_source_tracking_controls,
|
||||
ARRAY_SIZE(msm_source_tracking_controls));
|
||||
ARRAY_SIZE(msm_source_tracking_controls));
|
||||
snd_soc_add_platform_controls(platform, adm_channel_config_controls,
|
||||
ARRAY_SIZE(adm_channel_config_controls));
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -360,6 +360,7 @@ struct msm_pcm_routing_bdai_data {
|
|||
unsigned int sample_rate;
|
||||
unsigned int channel;
|
||||
unsigned int format;
|
||||
unsigned int adm_override_ch;
|
||||
u32 compr_passthr_mode;
|
||||
char *name;
|
||||
};
|
||||
|
|
Loading…
Add table
Reference in a new issue