drm/i915: Discard the unused obj->last_fenced_ring
As we now never pipeline a fence update, obj->last_fenced_ring is always the same as the obj->ring whenever obj->last_fenced_seqno is active, so remove it. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
parent
69963e7c76
commit
1c293ea3b1
2 changed files with 7 additions and 14 deletions
|
@ -930,13 +930,12 @@ struct drm_i915_gem_object {
|
||||||
*/
|
*/
|
||||||
uint32_t gtt_offset;
|
uint32_t gtt_offset;
|
||||||
|
|
||||||
/** Breadcrumb of last rendering to the buffer. */
|
|
||||||
uint32_t last_rendering_seqno;
|
|
||||||
struct intel_ring_buffer *ring;
|
struct intel_ring_buffer *ring;
|
||||||
|
|
||||||
|
/** Breadcrumb of last rendering to the buffer. */
|
||||||
|
uint32_t last_rendering_seqno;
|
||||||
/** Breadcrumb of last fenced GPU access to the buffer. */
|
/** Breadcrumb of last fenced GPU access to the buffer. */
|
||||||
uint32_t last_fenced_seqno;
|
uint32_t last_fenced_seqno;
|
||||||
struct intel_ring_buffer *last_fenced_ring;
|
|
||||||
|
|
||||||
/** Current tiling stride for the object, if it's tiled. */
|
/** Current tiling stride for the object, if it's tiled. */
|
||||||
uint32_t stride;
|
uint32_t stride;
|
||||||
|
|
|
@ -1398,7 +1398,6 @@ i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
|
||||||
|
|
||||||
if (obj->fenced_gpu_access) {
|
if (obj->fenced_gpu_access) {
|
||||||
obj->last_fenced_seqno = seqno;
|
obj->last_fenced_seqno = seqno;
|
||||||
obj->last_fenced_ring = ring;
|
|
||||||
|
|
||||||
/* Bump MRU to take account of the delayed flush */
|
/* Bump MRU to take account of the delayed flush */
|
||||||
if (obj->fence_reg != I915_FENCE_REG_NONE) {
|
if (obj->fence_reg != I915_FENCE_REG_NONE) {
|
||||||
|
@ -1445,7 +1444,6 @@ i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj)
|
||||||
BUG_ON(!list_empty(&obj->gpu_write_list));
|
BUG_ON(!list_empty(&obj->gpu_write_list));
|
||||||
BUG_ON(!obj->active);
|
BUG_ON(!obj->active);
|
||||||
obj->ring = NULL;
|
obj->ring = NULL;
|
||||||
obj->last_fenced_ring = NULL;
|
|
||||||
|
|
||||||
i915_gem_object_move_off_active(obj);
|
i915_gem_object_move_off_active(obj);
|
||||||
obj->fenced_gpu_access = false;
|
obj->fenced_gpu_access = false;
|
||||||
|
@ -1650,7 +1648,6 @@ static void i915_gem_reset_fences(struct drm_device *dev)
|
||||||
reg->obj->fence_reg = I915_FENCE_REG_NONE;
|
reg->obj->fence_reg = I915_FENCE_REG_NONE;
|
||||||
reg->obj->fenced_gpu_access = false;
|
reg->obj->fenced_gpu_access = false;
|
||||||
reg->obj->last_fenced_seqno = 0;
|
reg->obj->last_fenced_seqno = 0;
|
||||||
reg->obj->last_fenced_ring = NULL;
|
|
||||||
i915_gem_clear_fence_reg(dev, reg);
|
i915_gem_clear_fence_reg(dev, reg);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -2295,7 +2292,7 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj)
|
||||||
|
|
||||||
if (obj->fenced_gpu_access) {
|
if (obj->fenced_gpu_access) {
|
||||||
if (obj->base.write_domain & I915_GEM_GPU_DOMAINS) {
|
if (obj->base.write_domain & I915_GEM_GPU_DOMAINS) {
|
||||||
ret = i915_gem_flush_ring(obj->last_fenced_ring,
|
ret = i915_gem_flush_ring(obj->ring,
|
||||||
0, obj->base.write_domain);
|
0, obj->base.write_domain);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
@ -2304,10 +2301,10 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj)
|
||||||
obj->fenced_gpu_access = false;
|
obj->fenced_gpu_access = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (obj->last_fenced_seqno && NULL != obj->last_fenced_ring) {
|
if (obj->last_fenced_seqno) {
|
||||||
if (!ring_passed_seqno(obj->last_fenced_ring,
|
if (!ring_passed_seqno(obj->ring,
|
||||||
obj->last_fenced_seqno)) {
|
obj->last_fenced_seqno)) {
|
||||||
ret = i915_wait_request(obj->last_fenced_ring,
|
ret = i915_wait_request(obj->ring,
|
||||||
obj->last_fenced_seqno,
|
obj->last_fenced_seqno,
|
||||||
true);
|
true);
|
||||||
if (ret)
|
if (ret)
|
||||||
|
@ -2315,7 +2312,6 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj)
|
||||||
}
|
}
|
||||||
|
|
||||||
obj->last_fenced_seqno = 0;
|
obj->last_fenced_seqno = 0;
|
||||||
obj->last_fenced_ring = NULL;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Ensure that all CPU reads are completed before installing a fence
|
/* Ensure that all CPU reads are completed before installing a fence
|
||||||
|
@ -2382,7 +2378,7 @@ i915_find_fence_reg(struct drm_device *dev)
|
||||||
if (first == NULL)
|
if (first == NULL)
|
||||||
first = reg;
|
first = reg;
|
||||||
|
|
||||||
if (reg->obj->last_fenced_ring == NULL) {
|
if (reg->obj->last_fenced_seqno == 0) {
|
||||||
avail = reg;
|
avail = reg;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -2458,7 +2454,6 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj)
|
||||||
}
|
}
|
||||||
|
|
||||||
old->fence_reg = I915_FENCE_REG_NONE;
|
old->fence_reg = I915_FENCE_REG_NONE;
|
||||||
old->last_fenced_ring = NULL;
|
|
||||||
old->last_fenced_seqno = 0;
|
old->last_fenced_seqno = 0;
|
||||||
|
|
||||||
drm_gem_object_unreference(&old->base);
|
drm_gem_object_unreference(&old->base);
|
||||||
|
@ -2467,7 +2462,6 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj)
|
||||||
reg->obj = obj;
|
reg->obj = obj;
|
||||||
list_move_tail(®->lru_list, &dev_priv->mm.fence_list);
|
list_move_tail(®->lru_list, &dev_priv->mm.fence_list);
|
||||||
obj->fence_reg = reg - dev_priv->fence_regs;
|
obj->fence_reg = reg - dev_priv->fence_regs;
|
||||||
obj->last_fenced_ring = NULL;
|
|
||||||
|
|
||||||
update:
|
update:
|
||||||
obj->tiling_changed = false;
|
obj->tiling_changed = false;
|
||||||
|
|
Loading…
Add table
Reference in a new issue