Fix regression for bad uart muxing and oops when PM is not set.
Revert one softreset regression and few other minor fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJPje8aAAoJEBvUPslcq6VzBUwP/A+wAxBJFpp5Og8nv6A3dHIC Wf/kSMk5wx5Qtyi1Q6ySOZ/QyDbE5RJIXhqRfE5fRru7xiVRaNCkvDl8Nf3Z8I9F Yg9TtWXlO3zK2k9eGYflJASt+Rgms5qZ2VK9wT2sH/SNY5XgJuTdhzVdvJGWb9d1 CcKpOZU/WHZIfCn05PfWOGlwI//hUqb0HMTBsAOFFYfSdGcSDOYPTzQupCooaLuD seg3W2ZVHGLyNrw7kUrEbYd41TbbWo1pZq5JE56qjMS6x+5rgyggum+kCVCrCXPy Y9KCedbmAvZGSerEgyNGuK/iMwKNHjacs1lqm52Z66qOt14RmdEVzQ1iVPnEa34Z PXFXFAANFUzzab0gaP2CuZzoQCwjB0atpnZZgmo6zJ0pkY+AnPQjHby+YXZj1XyU d/anseZ9UFZ6zPWP0B3WugbuqzH4S359THCGzNvYa04BgeBR8Bi5yaeO0J1CE7Hy YbmDT7n8hn4K4b+ETKX785BoNfmAytfyJK2Oir0cTyKiqF+49mtWerSP0sY4NAAq r5Uuotj27idJkXHzASrEYXGKb4Hv8AwnCsRvSGl7b9JU86lPiP7JCxpOGdnNqBzz jG71RjNMRh0Tyi9PjmXn3enq+sxWJmxx7NOhzBUlzInuUGWxBcedUHHL3g1NW9+2 wTO1I4SUzQDXU+hJyQoY =WQ2B -----END PGP SIGNATURE----- Merge tag 'omap-fixes-for-v3.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Fix regression for bad uart muxing and oops when PM is not set. Revert one softreset regression and few other minor fixes. * tag 'omap-fixes-for-v3.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP1: DMTIMER: fix broken timer clock source selection ARM: OMAP: serial: Fix the ocp smart idlemode handling bug ARM: OMAP2+: UART: Fix incorrect population of default uart pads ARM: OMAP: sram: fix BUG in dpll code for !PM case ARM: OMAP2/3: VENC hwmods: Remove OCPIF_SWSUP_IDLE flag from VENC slave interface ARM: OMAP2+: hwmod: Revert "ARM: OMAP2+: hwmod: Make omap_hwmod_softreset wait for reset status" ARM: OMAP2+: hwmod: add softreset delay field and OMAP4 data ARM: OMAP1: mux: add missing include
This commit is contained in:
commit
1c2e1fd1ca
10 changed files with 43 additions and 131 deletions
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@ -27,6 +27,7 @@
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/spinlock.h>
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#include <linux/spinlock.h>
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#include <mach/hardware.h>
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#include <plat/mux.h>
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#include <plat/mux.h>
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@ -47,9 +47,9 @@ static int omap1_dm_timer_set_src(struct platform_device *pdev,
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int n = (pdev->id - 1) << 1;
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int n = (pdev->id - 1) << 1;
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u32 l;
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u32 l;
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l = __raw_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
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l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
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l |= source << n;
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l |= source << n;
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__raw_writel(l, MOD_CONF_CTRL_1);
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omap_writel(l, MOD_CONF_CTRL_1);
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return 0;
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return 0;
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}
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}
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@ -1422,6 +1422,9 @@ static int _ocp_softreset(struct omap_hwmod *oh)
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goto dis_opt_clks;
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goto dis_opt_clks;
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_write_sysconfig(v, oh);
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_write_sysconfig(v, oh);
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if (oh->class->sysc->srst_udelay)
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udelay(oh->class->sysc->srst_udelay);
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if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
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if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
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omap_test_timeout((omap_hwmod_read(oh,
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omap_test_timeout((omap_hwmod_read(oh,
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oh->class->sysc->syss_offs)
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oh->class->sysc->syss_offs)
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@ -1903,10 +1906,20 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
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*/
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*/
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int omap_hwmod_softreset(struct omap_hwmod *oh)
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int omap_hwmod_softreset(struct omap_hwmod *oh)
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{
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{
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if (!oh)
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u32 v;
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int ret;
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if (!oh || !(oh->_sysc_cache))
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return -EINVAL;
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return -EINVAL;
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return _ocp_softreset(oh);
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v = oh->_sysc_cache;
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ret = _set_softreset(oh, &v);
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if (ret)
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goto error;
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_write_sysconfig(v, oh);
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error:
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return ret;
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}
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}
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/**
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/**
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@ -1000,7 +1000,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
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.flags = OMAP_FIREWALL_L4,
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.flags = OMAP_FIREWALL_L4,
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}
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}
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},
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},
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.flags = OCPIF_SWSUP_IDLE,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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};
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@ -1049,7 +1049,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
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.slave = &omap2430_dss_venc_hwmod,
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.slave = &omap2430_dss_venc_hwmod,
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.clk = "dss_ick",
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.clk = "dss_ick",
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.addr = omap2_dss_venc_addrs,
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.addr = omap2_dss_venc_addrs,
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.flags = OCPIF_SWSUP_IDLE,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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};
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@ -1676,7 +1676,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
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.flags = OMAP_FIREWALL_L4,
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.flags = OMAP_FIREWALL_L4,
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}
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}
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},
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},
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.flags = OCPIF_SWSUP_IDLE,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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};
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@ -2594,6 +2594,15 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
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static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = {
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static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = {
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.rev_offs = 0x0000,
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.sysc_offs = 0x0010,
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/*
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* ISS needs 100 OCP clk cycles delay after a softreset before
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* accessing sysconfig again.
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* The lowest frequency at the moment for L3 bus is 100 MHz, so
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* 1usec delay is needed. Add an x2 margin to be safe (2 usecs).
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*
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* TODO: Indicate errata when available.
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*/
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.srst_udelay = 2,
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.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
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.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
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SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
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SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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@ -108,8 +108,14 @@ static void omap_uart_set_noidle(struct platform_device *pdev)
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static void omap_uart_set_smartidle(struct platform_device *pdev)
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static void omap_uart_set_smartidle(struct platform_device *pdev)
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{
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{
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struct omap_device *od = to_omap_device(pdev);
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struct omap_device *od = to_omap_device(pdev);
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u8 idlemode;
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omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART);
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if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP)
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idlemode = HWMOD_IDLEMODE_SMART_WKUP;
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else
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idlemode = HWMOD_IDLEMODE_SMART;
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omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode);
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}
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}
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#else
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#else
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@ -120,124 +126,8 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {}
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#endif /* CONFIG_PM */
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#endif /* CONFIG_PM */
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#ifdef CONFIG_OMAP_MUX
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#ifdef CONFIG_OMAP_MUX
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static struct omap_device_pad default_uart1_pads[] __initdata = {
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{
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.name = "uart1_cts.uart1_cts",
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.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
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},
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{
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.name = "uart1_rts.uart1_rts",
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.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
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},
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{
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.name = "uart1_tx.uart1_tx",
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.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
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},
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{
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.name = "uart1_rx.uart1_rx",
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.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
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.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
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.idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
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},
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};
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static struct omap_device_pad default_uart2_pads[] __initdata = {
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{
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.name = "uart2_cts.uart2_cts",
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.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
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},
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{
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.name = "uart2_rts.uart2_rts",
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.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
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},
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{
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.name = "uart2_tx.uart2_tx",
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.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
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},
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{
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.name = "uart2_rx.uart2_rx",
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.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
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.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
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.idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
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},
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};
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static struct omap_device_pad default_uart3_pads[] __initdata = {
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{
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.name = "uart3_cts_rctx.uart3_cts_rctx",
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.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
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},
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{
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.name = "uart3_rts_sd.uart3_rts_sd",
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.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
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},
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{
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.name = "uart3_tx_irtx.uart3_tx_irtx",
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.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
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},
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{
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.name = "uart3_rx_irrx.uart3_rx_irrx",
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.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
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.enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
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.idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
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},
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};
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static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
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{
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.name = "gpmc_wait2.uart4_tx",
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.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
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},
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{
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.name = "gpmc_wait3.uart4_rx",
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.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
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.enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
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.idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
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},
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};
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static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
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{
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.name = "uart4_tx.uart4_tx",
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.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
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},
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{
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.name = "uart4_rx.uart4_rx",
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.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
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.enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
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.idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
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},
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};
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static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
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static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
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{
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{
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switch (bdata->id) {
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case 0:
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bdata->pads = default_uart1_pads;
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bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
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break;
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case 1:
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bdata->pads = default_uart2_pads;
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bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
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break;
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case 2:
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bdata->pads = default_uart3_pads;
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bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
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break;
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case 3:
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if (cpu_is_omap44xx()) {
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bdata->pads = default_omap4_uart4_pads;
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bdata->pads_cnt =
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ARRAY_SIZE(default_omap4_uart4_pads);
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} else if (cpu_is_omap3630()) {
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bdata->pads = default_omap36xx_uart4_pads;
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bdata->pads_cnt =
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ARRAY_SIZE(default_omap36xx_uart4_pads);
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}
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break;
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default:
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break;
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}
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}
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}
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#else
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#else
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static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
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static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
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@ -305,6 +305,7 @@ struct omap_hwmod_sysc_fields {
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* @rev_offs: IP block revision register offset (from module base addr)
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* @rev_offs: IP block revision register offset (from module base addr)
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* @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
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* @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
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* @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
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* @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
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* @srst_udelay: Delay needed after doing a softreset in usecs
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* @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
|
* @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
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* @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
|
* @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
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* @clockact: the default value of the module CLOCKACTIVITY bits
|
* @clockact: the default value of the module CLOCKACTIVITY bits
|
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|
@ -330,9 +331,10 @@ struct omap_hwmod_class_sysconfig {
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u16 sysc_offs;
|
u16 sysc_offs;
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u16 syss_offs;
|
u16 syss_offs;
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u16 sysc_flags;
|
u16 sysc_flags;
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||||||
|
struct omap_hwmod_sysc_fields *sysc_fields;
|
||||||
|
u8 srst_udelay;
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u8 idlemodes;
|
u8 idlemodes;
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u8 clockact;
|
u8 clockact;
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struct omap_hwmod_sysc_fields *sysc_fields;
|
|
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};
|
};
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|
|
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/**
|
/**
|
||||||
|
|
|
@ -348,7 +348,6 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
|
||||||
sdrc_actim_ctrl_b_1, sdrc_mr_1);
|
sdrc_actim_ctrl_b_1, sdrc_mr_1);
|
||||||
}
|
}
|
||||||
|
|
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#ifdef CONFIG_PM
|
|
||||||
void omap3_sram_restore_context(void)
|
void omap3_sram_restore_context(void)
|
||||||
{
|
{
|
||||||
omap_sram_ceil = omap_sram_base + omap_sram_size;
|
omap_sram_ceil = omap_sram_base + omap_sram_size;
|
||||||
|
@ -358,17 +357,18 @@ void omap3_sram_restore_context(void)
|
||||||
omap3_sram_configure_core_dpll_sz);
|
omap3_sram_configure_core_dpll_sz);
|
||||||
omap_push_sram_idle();
|
omap_push_sram_idle();
|
||||||
}
|
}
|
||||||
#endif /* CONFIG_PM */
|
|
||||||
|
|
||||||
#endif /* CONFIG_ARCH_OMAP3 */
|
|
||||||
|
|
||||||
static inline int omap34xx_sram_init(void)
|
static inline int omap34xx_sram_init(void)
|
||||||
{
|
{
|
||||||
#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
|
|
||||||
omap3_sram_restore_context();
|
omap3_sram_restore_context();
|
||||||
#endif
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
#else
|
||||||
|
static inline int omap34xx_sram_init(void)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif /* CONFIG_ARCH_OMAP3 */
|
||||||
|
|
||||||
static inline int am33xx_sram_init(void)
|
static inline int am33xx_sram_init(void)
|
||||||
{
|
{
|
||||||
|
|
Loading…
Add table
Reference in a new issue