evie/android_kernel_oneplus_msm8998
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Merge "ARM: dts: msm: Update csi source clk in msm8998"

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Linux Build Service Account 2017-02-03 06:26:39 -08:00 • committed by Gerrit - the friendly Code Review server
commit 1c6b26d03c
2 changed files with 17 additions and 17 deletions
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20
arch/arm/boot/dts/qcom/msm8998-camera.dtsi
View file

@ -51,8 +51,8 @@
"csi_src_clk", "csi_clk", "cphy_csid_clk",
"csiphy_timer_src_clk", "csiphy_timer_clk",
"camss_ispif_ahb_clk", "csiphy_clk_src", "csiphy_clk";
qcom,clock-rates = <0 0 0 0 0 0 256000000 0 0 200000000 0
0 256000000 0>;
qcom,clock-rates = <0 0 0 0 0 0 274290000 0 0 200000000 0
0 274290000 0>;
status = "ok";
};
@ -86,8 +86,8 @@
"csi_src_clk", "csi_clk", "cphy_csid_clk",
"csiphy_timer_src_clk", "csiphy_timer_clk",
"camss_ispif_ahb_clk", "csiphy_clk_src", "csiphy_clk";
qcom,clock-rates = <0 0 0 0 0 0 256000000 0 0 200000000 0
0 256000000 0>;
qcom,clock-rates = <0 0 0 0 0 0 274290000 0 0 200000000 0
0 274290000 0>;
status = "ok";
};
@ -121,8 +121,8 @@
"csi_src_clk", "csi_clk", "cphy_csid_clk",
"csiphy_timer_src_clk", "csiphy_timer_clk",
"camss_ispif_ahb_clk", "csiphy_clk_src", "csiphy_clk";
qcom,clock-rates = <0 0 0 0 0 0 256000000 0 0 200000000 0
0 256000000 0>;
qcom,clock-rates = <0 0 0 0 0 0 274290000 0 0 200000000 0
0 274290000 0>;
status = "ok";
};
@ -159,7 +159,7 @@
"ispif_ahb_clk", "csi_src_clk", "csiphy_clk_src",
"csi_clk", "csi_ahb_clk", "csi_rdi_clk",
"csi_pix_clk", "cphy_csid_clk";
qcom,clock-rates = <0 0 0 0 0 0 0 256000000 256000000
qcom,clock-rates = <0 0 0 0 0 0 0 274290000 274290000
0 0 0 0 0>;
status = "ok";
};
@ -197,7 +197,7 @@
"ispif_ahb_clk", "csi_src_clk", "csiphy_clk_src",
"csi_clk", "csi_ahb_clk", "csi_rdi_clk",
"csi_pix_clk", "cphy_csid_clk";
qcom,clock-rates = <0 0 0 0 0 0 0 256000000 256000000
qcom,clock-rates = <0 0 0 0 0 0 0 274290000 274290000
0 0 0 0 0>;
status = "ok";
};
@ -235,7 +235,7 @@
"ispif_ahb_clk", "csi_src_clk", "csiphy_clk_src",
"csi_clk", "csi_ahb_clk", "csi_rdi_clk",
"csi_pix_clk", "cphy_csid_clk";
qcom,clock-rates = <0 0 0 0 0 0 0 256000000 256000000
qcom,clock-rates = <0 0 0 0 0 0 0 274290000 274290000
0 0 0 0 0>;
status = "ok";
};
@ -273,7 +273,7 @@
"ispif_ahb_clk", "csi_src_clk", "csiphy_clk_src",
"csi_clk", "csi_ahb_clk", "csi_rdi_clk",
"csi_pix_clk", "cphy_csid_clk";
qcom,clock-rates = <0 0 0 0 0 0 0 256000000 256000000
qcom,clock-rates = <0 0 0 0 0 0 0 274290000 274290000
0 0 0 0 0>;
status = "ok";
};

14
arch/arm/boot/dts/qcom/msm8998-v2-camera.dtsi
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -42,8 +42,8 @@
"csi_src_clk", "csi_clk", "cphy_csid_clk",
"csiphy_timer_src_clk", "csiphy_timer_clk",
"camss_ispif_ahb_clk", "csiphy_clk_src", "csiphy_clk";
qcom,clock-rates = <0 0 0 0 0 0 256000000 0 0 200000000 0
0 256000000 0>;
qcom,clock-rates = <0 0 0 0 0 0 274290000 0 0 200000000 0
0 274290000 0>;
status = "ok";
};
@ -77,8 +77,8 @@
"csi_src_clk", "csi_clk", "cphy_csid_clk",
"csiphy_timer_src_clk", "csiphy_timer_clk",
"camss_ispif_ahb_clk", "csiphy_clk_src", "csiphy_clk";
qcom,clock-rates = <0 0 0 0 0 0 256000000 0 0 200000000 0
0 256000000 0>;
qcom,clock-rates = <0 0 0 0 0 0 274290000 0 0 200000000 0
0 274290000 0>;
status = "ok";
};
@ -112,8 +112,8 @@
"csi_src_clk", "csi_clk", "cphy_csid_clk",
"csiphy_timer_src_clk", "csiphy_timer_clk",
"camss_ispif_ahb_clk", "csiphy_clk_src", "csiphy_clk";
qcom,clock-rates = <0 0 0 0 0 0 256000000 0 0 200000000 0
0 256000000 0>;
qcom,clock-rates = <0 0 0 0 0 0 274290000 0 0 200000000 0
0 274290000 0>;
status = "ok";
};