diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 7328b2847e02..ddca4c39e2de 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -61,7 +61,6 @@ Optional properties: - snps,num-gsi-evt-buffs: If present, specifies number of GSI based hardware accelerated event buffers. 1 event buffer is needed per h/w accelerated endpoint. - xhci-imod-value: Interrupt moderation interval for host mode (in increments of 250nsec). - - usb-core-id: Differentiates between different controllers present on a device. This is usually a subnode to DWC3 glue to which it is connected. diff --git a/arch/arm/boot/dts/qcom/msm8996.dtsi b/arch/arm/boot/dts/qcom/msm8996.dtsi index efc91f9f86f7..c77d7fd9869c 100644 --- a/arch/arm/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996.dtsi @@ -2018,7 +2018,6 @@ snps,nominal-elastic-buffer; snps,is-utmi-l1-suspend; snps,hird-threshold = /bits/ 8 <0x0>; - usb-core-id = <0>; }; qcom,usbbam@6b04000 { @@ -2127,7 +2126,6 @@ snps,nominal-elastic-buffer; snps,is-utmi-l1-suspend; snps,hird-threshold = /bits/ 8 <0x0>; - usb-core-id = <1>; }; }; diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index 61fb325e4267..b8ff368e4464 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -233,10 +233,6 @@ static int xhci_plat_probe(struct platform_device *pdev) hcd_to_bus(xhci->shared_hcd)->skip_resume = true; - if (device_property_read_u32(pdev->dev.parent, "usb-core-id", - &xhci->core_id)) - xhci->core_id = -EINVAL; - hcd->usb_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0); if (IS_ERR(hcd->usb_phy)) { ret = PTR_ERR(hcd->usb_phy); diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index f583cefecee0..c665806983be 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1519,8 +1519,6 @@ struct xhci_hcd { /* secondary interrupter */ struct xhci_intr_reg __iomem **sec_ir_set; - int core_id; - /* Cached register copies of read-only HC data */ __u32 hcs_params1; __u32 hcs_params2;