sh: intc: initial irqdomain support.
Trivial support for irq domains, using either a linear map or radix tree depending on the vector layout. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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5 changed files with 85 additions and 5 deletions
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@ -1,3 +1,7 @@
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config SH_INTC
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def_bool y
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select IRQ_DOMAIN
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comment "Interrupt controller options"
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comment "Interrupt controller options"
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config INTC_USERIMASK
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config INTC_USERIMASK
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@ -1,4 +1,4 @@
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obj-y := access.o chip.o core.o handle.o virq.o
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obj-y := access.o chip.o core.o handle.o irqdomain.o virq.o
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obj-$(CONFIG_INTC_BALANCING) += balancing.o
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obj-$(CONFIG_INTC_BALANCING) += balancing.o
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obj-$(CONFIG_INTC_USERIMASK) += userimask.o
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obj-$(CONFIG_INTC_USERIMASK) += userimask.o
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@ -25,6 +25,7 @@
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#include <linux/stat.h>
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#include <linux/stat.h>
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/sh_intc.h>
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#include <linux/sh_intc.h>
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#include <linux/irqdomain.h>
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#include <linux/device.h>
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#include <linux/device.h>
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#include <linux/syscore_ops.h>
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#include <linux/syscore_ops.h>
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#include <linux/list.h>
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#include <linux/list.h>
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@ -310,6 +311,8 @@ int __init register_intc_controller(struct intc_desc *desc)
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BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
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BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
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intc_irq_domain_init(d, hw);
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/* register the vectors one by one */
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/* register the vectors one by one */
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for (i = 0; i < hw->nr_vectors; i++) {
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for (i = 0; i < hw->nr_vectors; i++) {
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struct intc_vect *vect = hw->vectors + i;
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struct intc_vect *vect = hw->vectors + i;
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@ -319,8 +322,8 @@ int __init register_intc_controller(struct intc_desc *desc)
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if (!vect->enum_id)
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if (!vect->enum_id)
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continue;
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continue;
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res = irq_alloc_desc_at(irq, numa_node_id());
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res = irq_create_identity_mapping(d->domain, irq);
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if (res != irq && res != -EEXIST) {
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if (unlikely(res)) {
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pr_err("can't get irq_desc for %d\n", irq);
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pr_err("can't get irq_desc for %d\n", irq);
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continue;
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continue;
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}
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}
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@ -340,8 +343,8 @@ int __init register_intc_controller(struct intc_desc *desc)
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* IRQ support, each vector still needs to have
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* IRQ support, each vector still needs to have
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* its own backing irq_desc.
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* its own backing irq_desc.
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*/
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*/
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res = irq_alloc_desc_at(irq2, numa_node_id());
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res = irq_create_identity_mapping(d->domain, irq2);
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if (res != irq2 && res != -EEXIST) {
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if (unlikely(res)) {
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pr_err("can't get irq_desc for %d\n", irq2);
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pr_err("can't get irq_desc for %d\n", irq2);
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continue;
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continue;
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}
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}
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@ -1,5 +1,6 @@
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#include <linux/sh_intc.h>
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#include <linux/sh_intc.h>
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#include <linux/irq.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/list.h>
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#include <linux/list.h>
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/types.h>
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@ -66,6 +67,7 @@ struct intc_desc_int {
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unsigned int nr_sense;
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unsigned int nr_sense;
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struct intc_window *window;
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struct intc_window *window;
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unsigned int nr_windows;
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unsigned int nr_windows;
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struct irq_domain *domain;
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struct irq_chip chip;
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struct irq_chip chip;
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bool skip_suspend;
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bool skip_suspend;
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};
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};
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@ -187,6 +189,9 @@ unsigned long intc_get_ack_handle(unsigned int irq);
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void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
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void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
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intc_enum enum_id, int enable);
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intc_enum enum_id, int enable);
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/* irqdomain.c */
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void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw);
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/* virq.c */
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/* virq.c */
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void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
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void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
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void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d);
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void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d);
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68
drivers/sh/intc/irqdomain.c
Normal file
68
drivers/sh/intc/irqdomain.c
Normal file
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@ -0,0 +1,68 @@
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/*
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* IRQ domain support for SH INTC subsystem
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*
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* Copyright (C) 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define pr_fmt(fmt) "intc: " fmt
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#include <linux/irqdomain.h>
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#include <linux/sh_intc.h>
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#include <linux/export.h>
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#include "internals.h"
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/**
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* intc_irq_domain_evt_xlate() - Generic xlate for vectored IRQs.
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*
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* This takes care of exception vector to hwirq translation through
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* by way of evt2irq() translation.
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*
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* Note: For platforms that use a flat vector space without INTEVT this
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* basically just mimics irq_domain_xlate_onecell() by way of a nopped
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* out evt2irq() implementation.
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*/
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static int intc_evt_xlate(struct irq_domain *d, struct device_node *ctrlr,
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const u32 *intspec, unsigned int intsize,
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unsigned long *out_hwirq, unsigned int *out_type)
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{
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if (WARN_ON(intsize < 1))
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return -EINVAL;
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*out_hwirq = evt2irq(intspec[0]);
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*out_type = IRQ_TYPE_NONE;
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return 0;
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}
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static const struct irq_domain_ops intc_evt_ops = {
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.xlate = intc_evt_xlate,
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};
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void __init intc_irq_domain_init(struct intc_desc_int *d,
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struct intc_hw_desc *hw)
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{
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unsigned int irq_base, irq_end;
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/*
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* Quick linear revmap check
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*/
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irq_base = evt2irq(hw->vectors[0].vect);
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irq_end = evt2irq(hw->vectors[hw->nr_vectors - 1].vect);
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/*
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* Linear domains have a hard-wired assertion that IRQs start at
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* 0 in order to make some performance optimizations. Lamely
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* restrict the linear case to these conditions here, taking the
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* tree penalty for linear cases with non-zero hwirq bases.
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*/
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if (irq_base == 0 && irq_end == (irq_base + hw->nr_vectors - 1))
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d->domain = irq_domain_add_linear(NULL, hw->nr_vectors,
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&intc_evt_ops, NULL);
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else
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d->domain = irq_domain_add_tree(NULL, &intc_evt_ops, NULL);
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BUG_ON(!d->domain);
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}
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