evie/android_kernel_oneplus_msm8998
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msm: mdss: delay clearing the DSI error interrupt

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At present, the DSI error interrupt is cleared before the
respective errors are handled. This might cause re-generation
of the error interrupt which causes the ISR to be scheduled
again. Hence clear the DSI error interrupt after the errors
are handled.

Change-Id: I42b1d0beee8597e60b4103106ebbeffe6caf065e
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
This commit is contained in:
Padmanabhan Komanduru 2014-11-17 15:51:56 +05:30 • committed by David Keitel
parent 2ceb2d0ec0
commit 1dd551da28
1 changed files with 8 additions and 1 deletions
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9
drivers/video/fbdev/msm/mdss_dsi_host.c
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@ -2150,6 +2150,7 @@ void mdss_dsi_clk_status(struct mdss_dsi_ctrl_pdata *ctrl)
void mdss_dsi_error(struct mdss_dsi_ctrl_pdata *ctrl)
{
u32 intr;
/* disable dsi error interrupt */
mdss_dsi_err_intr_ctrl(ctrl, DSI_INTR_ERROR_MASK, 0);
@ -2162,6 +2163,12 @@ void mdss_dsi_error(struct mdss_dsi_ctrl_pdata *ctrl)
mdss_dsi_status(ctrl); /* mask0, 0xc0100 */
mdss_dsi_dln0_phy_err(ctrl); /* mask0, 0x3e00000 */
/* clear dsi error interrupt */
intr = MIPI_INP(ctrl->ctrl_base + 0x0110);
intr &= DSI_INTR_TOTAL_MASK;
intr |= DSI_INTR_ERROR;
MIPI_OUTP(ctrl->ctrl_base + 0x0110, intr);
dsi_send_events(ctrl, DSI_EV_MDP_BUSY_RELEASE);
}
@ -2178,7 +2185,7 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr)
}
isr = MIPI_INP(ctrl->ctrl_base + 0x0110);/* DSI_INTR_CTRL */
MIPI_OUTP(ctrl->ctrl_base + 0x0110, isr);
MIPI_OUTP(ctrl->ctrl_base + 0x0110, (isr & ~DSI_INTR_ERROR));
pr_debug("%s: ndx=%d isr=%x\n", __func__, ctrl->ndx, isr);