spmi: pmic-arb: rename spmi_pmic_arb_dev to spmi_pmic_arb

Usually *_dev best used for structures that embed a struct device in
them. spmi_pmic_arb_dev doesn't embed one. It is simply a driver data
structure. Use an appropriate name for it.

Change-Id: I432eeb0273cac78638440cd00c64cc568ccd68c5
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
This commit is contained in:
Abhijeet Dharmapurikar 2016-01-08 12:45:20 -08:00 committed by Rohit Vaswani
parent eb187ad622
commit 20477f69c1

View file

@ -99,7 +99,7 @@ enum pmic_arb_cmd_op_code {
struct pmic_arb_ver_ops; struct pmic_arb_ver_ops;
/** /**
* spmi_pmic_arb_dev - SPMI PMIC Arbiter object * spmi_pmic_arb - SPMI PMIC Arbiter object
* *
* @rd_base: on v1 "core", on v2 "observer" register base off DT. * @rd_base: on v1 "core", on v2 "observer" register base off DT.
* @wr_base: on v1 "core", on v2 "chnls" register base off DT. * @wr_base: on v1 "core", on v2 "chnls" register base off DT.
@ -120,7 +120,7 @@ struct pmic_arb_ver_ops;
* @ppid_to_chan in-memory copy of PPID -> channel (APID) mapping table. * @ppid_to_chan in-memory copy of PPID -> channel (APID) mapping table.
* v2 only. * v2 only.
*/ */
struct spmi_pmic_arb_dev { struct spmi_pmic_arb {
void __iomem *rd_base; void __iomem *rd_base;
void __iomem *wr_base; void __iomem *wr_base;
void __iomem *intr; void __iomem *intr;
@ -164,10 +164,10 @@ struct spmi_pmic_arb_dev {
* on v2 offset of SPMI_PIC_IRQ_CLEARn. * on v2 offset of SPMI_PIC_IRQ_CLEARn.
*/ */
struct pmic_arb_ver_ops { struct pmic_arb_ver_ops {
int (*mode)(struct spmi_pmic_arb_dev *dev, u8 sid, u16 addr, int (*mode)(struct spmi_pmic_arb *dev, u8 sid, u16 addr,
mode_t *mode); mode_t *mode);
/* spmi commands (read_cmd, write_cmd, cmd) functionality */ /* spmi commands (read_cmd, write_cmd, cmd) functionality */
int (*offset)(struct spmi_pmic_arb_dev *dev, u8 sid, u16 addr, int (*offset)(struct spmi_pmic_arb *dev, u8 sid, u16 addr,
u32 *offset); u32 *offset);
u32 (*fmt_cmd)(u8 opc, u8 sid, u16 addr, u8 bc); u32 (*fmt_cmd)(u8 opc, u8 sid, u16 addr, u8 bc);
int (*non_data_cmd)(struct spmi_controller *ctrl, u8 opc, u8 sid); int (*non_data_cmd)(struct spmi_controller *ctrl, u8 opc, u8 sid);
@ -178,16 +178,16 @@ struct pmic_arb_ver_ops {
u32 (*irq_clear)(u8 n); u32 (*irq_clear)(u8 n);
}; };
static inline void pmic_arb_base_write(struct spmi_pmic_arb_dev *dev, static inline void pmic_arb_base_write(struct spmi_pmic_arb *pa,
u32 offset, u32 val) u32 offset, u32 val)
{ {
writel_relaxed(val, dev->wr_base + offset); writel_relaxed(val, pa->wr_base + offset);
} }
static inline void pmic_arb_set_rd_cmd(struct spmi_pmic_arb_dev *dev, static inline void pmic_arb_set_rd_cmd(struct spmi_pmic_arb *pa,
u32 offset, u32 val) u32 offset, u32 val)
{ {
writel_relaxed(val, dev->rd_base + offset); writel_relaxed(val, pa->rd_base + offset);
} }
/** /**
@ -196,9 +196,10 @@ static inline void pmic_arb_set_rd_cmd(struct spmi_pmic_arb_dev *dev,
* @reg: register's address * @reg: register's address
* @buf: output parameter, length must be bc + 1 * @buf: output parameter, length must be bc + 1
*/ */
static void pa_read_data(struct spmi_pmic_arb_dev *dev, u8 *buf, u32 reg, u8 bc) static void pa_read_data(struct spmi_pmic_arb *pa, u8 *buf, u32 reg, u8 bc)
{ {
u32 data = __raw_readl(dev->rd_base + reg); u32 data = __raw_readl(pa->rd_base + reg);
memcpy(buf, &data, (bc & 3) + 1); memcpy(buf, &data, (bc & 3) + 1);
} }
@ -209,23 +210,24 @@ static void pa_read_data(struct spmi_pmic_arb_dev *dev, u8 *buf, u32 reg, u8 bc)
* @buf: buffer to write. length must be bc + 1. * @buf: buffer to write. length must be bc + 1.
*/ */
static void static void
pa_write_data(struct spmi_pmic_arb_dev *dev, const u8 *buf, u32 reg, u8 bc) pa_write_data(struct spmi_pmic_arb *pa, const u8 *buf, u32 reg, u8 bc)
{ {
u32 data = 0; u32 data = 0;
memcpy(&data, buf, (bc & 3) + 1); memcpy(&data, buf, (bc & 3) + 1);
__raw_writel(data, dev->wr_base + reg); pmic_arb_base_write(pa, reg, data);
} }
static int pmic_arb_wait_for_done(struct spmi_controller *ctrl, static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
void __iomem *base, u8 sid, u16 addr) void __iomem *base, u8 sid, u16 addr)
{ {
struct spmi_pmic_arb_dev *dev = spmi_controller_get_drvdata(ctrl); struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl);
u32 status = 0; u32 status = 0;
u32 timeout = PMIC_ARB_TIMEOUT_US; u32 timeout = PMIC_ARB_TIMEOUT_US;
u32 offset; u32 offset;
int rc; int rc;
rc = dev->ver_ops->offset(dev, sid, addr, &offset); rc = pa->ver_ops->offset(pa, sid, addr, &offset);
if (rc) if (rc)
return rc; return rc;
@ -270,22 +272,22 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
static int static int
pmic_arb_non_data_cmd_v1(struct spmi_controller *ctrl, u8 opc, u8 sid) pmic_arb_non_data_cmd_v1(struct spmi_controller *ctrl, u8 opc, u8 sid)
{ {
struct spmi_pmic_arb_dev *pmic_arb = spmi_controller_get_drvdata(ctrl); struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl);
unsigned long flags; unsigned long flags;
u32 cmd; u32 cmd;
int rc; int rc;
u32 offset; u32 offset;
rc = pmic_arb->ver_ops->offset(pmic_arb, sid, 0, &offset); rc = pa->ver_ops->offset(pa, sid, 0, &offset);
if (rc) if (rc)
return rc; return rc;
cmd = ((opc | 0x40) << 27) | ((sid & 0xf) << 20); cmd = ((opc | 0x40) << 27) | ((sid & 0xf) << 20);
raw_spin_lock_irqsave(&pmic_arb->lock, flags); raw_spin_lock_irqsave(&pa->lock, flags);
pmic_arb_base_write(pmic_arb, offset + PMIC_ARB_CMD, cmd); pmic_arb_base_write(pa, offset + PMIC_ARB_CMD, cmd);
rc = pmic_arb_wait_for_done(ctrl, pmic_arb->wr_base, sid, 0); rc = pmic_arb_wait_for_done(ctrl, pa->wr_base, sid, 0);
raw_spin_unlock_irqrestore(&pmic_arb->lock, flags); raw_spin_unlock_irqrestore(&pa->lock, flags);
return rc; return rc;
} }
@ -299,7 +301,7 @@ pmic_arb_non_data_cmd_v2(struct spmi_controller *ctrl, u8 opc, u8 sid)
/* Non-data command */ /* Non-data command */
static int pmic_arb_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid) static int pmic_arb_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid)
{ {
struct spmi_pmic_arb_dev *pmic_arb = spmi_controller_get_drvdata(ctrl); struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl);
dev_dbg(&ctrl->dev, "cmd op:0x%x sid:%d\n", opc, sid); dev_dbg(&ctrl->dev, "cmd op:0x%x sid:%d\n", opc, sid);
@ -307,13 +309,13 @@ static int pmic_arb_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid)
if (opc < SPMI_CMD_RESET || opc > SPMI_CMD_WAKEUP) if (opc < SPMI_CMD_RESET || opc > SPMI_CMD_WAKEUP)
return -EINVAL; return -EINVAL;
return pmic_arb->ver_ops->non_data_cmd(ctrl, opc, sid); return pa->ver_ops->non_data_cmd(ctrl, opc, sid);
} }
static int pmic_arb_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, static int pmic_arb_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
u16 addr, u8 *buf, size_t len) u16 addr, u8 *buf, size_t len)
{ {
struct spmi_pmic_arb_dev *pmic_arb = spmi_controller_get_drvdata(ctrl); struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl);
unsigned long flags; unsigned long flags;
u8 bc = len - 1; u8 bc = len - 1;
u32 cmd; u32 cmd;
@ -321,16 +323,16 @@ static int pmic_arb_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
u32 offset; u32 offset;
mode_t mode; mode_t mode;
rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr, &offset); rc = pa->ver_ops->offset(pa, sid, addr, &offset);
if (rc) if (rc)
return rc; return rc;
rc = pmic_arb->ver_ops->mode(pmic_arb, sid, addr, &mode); rc = pa->ver_ops->mode(pa, sid, addr, &mode);
if (rc) if (rc)
return rc; return rc;
if (!(mode & S_IRUSR)) { if (!(mode & S_IRUSR)) {
dev_err(&pmic_arb->spmic->dev, dev_err(&pa->spmic->dev,
"error: impermissible read from peripheral sid:%d addr:0x%x\n", "error: impermissible read from peripheral sid:%d addr:0x%x\n",
sid, addr); sid, addr);
return -ENODEV; return -ENODEV;
@ -353,30 +355,29 @@ static int pmic_arb_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
else else
return -EINVAL; return -EINVAL;
cmd = pmic_arb->ver_ops->fmt_cmd(opc, sid, addr, bc); cmd = pa->ver_ops->fmt_cmd(opc, sid, addr, bc);
raw_spin_lock_irqsave(&pmic_arb->lock, flags); raw_spin_lock_irqsave(&pa->lock, flags);
pmic_arb_set_rd_cmd(pmic_arb, offset + PMIC_ARB_CMD, cmd); pmic_arb_set_rd_cmd(pa, offset + PMIC_ARB_CMD, cmd);
rc = pmic_arb_wait_for_done(ctrl, pmic_arb->rd_base, sid, addr); rc = pmic_arb_wait_for_done(ctrl, pa->rd_base, sid, addr);
if (rc) if (rc)
goto done; goto done;
pa_read_data(pmic_arb, buf, offset + PMIC_ARB_RDATA0, pa_read_data(pa, buf, offset + PMIC_ARB_RDATA0,
min_t(u8, bc, 3)); min_t(u8, bc, 3));
if (bc > 3) if (bc > 3)
pa_read_data(pmic_arb, buf + 4, pa_read_data(pa, buf + 4, offset + PMIC_ARB_RDATA1, bc - 4);
offset + PMIC_ARB_RDATA1, bc - 4);
done: done:
raw_spin_unlock_irqrestore(&pmic_arb->lock, flags); raw_spin_unlock_irqrestore(&pa->lock, flags);
return rc; return rc;
} }
static int pmic_arb_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, static int pmic_arb_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
u16 addr, const u8 *buf, size_t len) u16 addr, const u8 *buf, size_t len)
{ {
struct spmi_pmic_arb_dev *pmic_arb = spmi_controller_get_drvdata(ctrl); struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl);
unsigned long flags; unsigned long flags;
u8 bc = len - 1; u8 bc = len - 1;
u32 cmd; u32 cmd;
@ -384,16 +385,16 @@ static int pmic_arb_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
u32 offset; u32 offset;
mode_t mode; mode_t mode;
rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr, &offset); rc = pa->ver_ops->offset(pa, sid, addr, &offset);
if (rc) if (rc)
return rc; return rc;
rc = pmic_arb->ver_ops->mode(pmic_arb, sid, addr, &mode); rc = pa->ver_ops->mode(pa, sid, addr, &mode);
if (rc) if (rc)
return rc; return rc;
if (!(mode & S_IWUSR)) { if (!(mode & S_IWUSR)) {
dev_err(&pmic_arb->spmic->dev, dev_err(&pa->spmic->dev,
"error: impermissible write to peripheral sid:%d addr:0x%x\n", "error: impermissible write to peripheral sid:%d addr:0x%x\n",
sid, addr); sid, addr);
return -ENODEV; return -ENODEV;
@ -418,20 +419,18 @@ static int pmic_arb_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
else else
return -EINVAL; return -EINVAL;
cmd = pmic_arb->ver_ops->fmt_cmd(opc, sid, addr, bc); cmd = pa->ver_ops->fmt_cmd(opc, sid, addr, bc);
/* Write data to FIFOs */ /* Write data to FIFOs */
raw_spin_lock_irqsave(&pmic_arb->lock, flags); raw_spin_lock_irqsave(&pa->lock, flags);
pa_write_data(pmic_arb, buf, offset + PMIC_ARB_WDATA0, pa_write_data(pa, buf, offset + PMIC_ARB_WDATA0, min_t(u8, bc, 3));
min_t(u8, bc, 3));
if (bc > 3) if (bc > 3)
pa_write_data(pmic_arb, buf + 4, pa_write_data(pa, buf + 4, offset + PMIC_ARB_WDATA1, bc - 4);
offset + PMIC_ARB_WDATA1, bc - 4);
/* Start the transaction */ /* Start the transaction */
pmic_arb_base_write(pmic_arb, offset + PMIC_ARB_CMD, cmd); pmic_arb_base_write(pa, offset + PMIC_ARB_CMD, cmd);
rc = pmic_arb_wait_for_done(ctrl, pmic_arb->wr_base, sid, addr); rc = pmic_arb_wait_for_done(ctrl, pa->wr_base, sid, addr);
raw_spin_unlock_irqrestore(&pmic_arb->lock, flags); raw_spin_unlock_irqrestore(&pa->lock, flags);
return rc; return rc;
} }
@ -457,7 +456,7 @@ struct spmi_pmic_arb_qpnpint_type {
static void qpnpint_spmi_write(struct irq_data *d, u8 reg, void *buf, static void qpnpint_spmi_write(struct irq_data *d, u8 reg, void *buf,
size_t len) size_t len)
{ {
struct spmi_pmic_arb_dev *pa = irq_data_get_irq_chip_data(d); struct spmi_pmic_arb *pa = irq_data_get_irq_chip_data(d);
u8 sid = d->hwirq >> 24; u8 sid = d->hwirq >> 24;
u8 per = d->hwirq >> 16; u8 per = d->hwirq >> 16;
@ -470,7 +469,7 @@ static void qpnpint_spmi_write(struct irq_data *d, u8 reg, void *buf,
static void qpnpint_spmi_read(struct irq_data *d, u8 reg, void *buf, size_t len) static void qpnpint_spmi_read(struct irq_data *d, u8 reg, void *buf, size_t len)
{ {
struct spmi_pmic_arb_dev *pa = irq_data_get_irq_chip_data(d); struct spmi_pmic_arb *pa = irq_data_get_irq_chip_data(d);
u8 sid = d->hwirq >> 24; u8 sid = d->hwirq >> 24;
u8 per = d->hwirq >> 16; u8 per = d->hwirq >> 16;
@ -481,7 +480,7 @@ static void qpnpint_spmi_read(struct irq_data *d, u8 reg, void *buf, size_t len)
d->irq); d->irq);
} }
static void periph_interrupt(struct spmi_pmic_arb_dev *pa, u8 apid) static void periph_interrupt(struct spmi_pmic_arb *pa, u8 apid)
{ {
unsigned int irq; unsigned int irq;
u32 status; u32 status;
@ -501,7 +500,7 @@ static void periph_interrupt(struct spmi_pmic_arb_dev *pa, u8 apid)
static void pmic_arb_chained_irq(struct irq_desc *desc) static void pmic_arb_chained_irq(struct irq_desc *desc)
{ {
struct spmi_pmic_arb_dev *pa = irq_desc_get_handler_data(desc); struct spmi_pmic_arb *pa = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc); struct irq_chip *chip = irq_desc_get_chip(desc);
void __iomem *intr = pa->intr; void __iomem *intr = pa->intr;
int first = pa->min_apid >> 5; int first = pa->min_apid >> 5;
@ -526,7 +525,7 @@ static void pmic_arb_chained_irq(struct irq_desc *desc)
static void qpnpint_irq_ack(struct irq_data *d) static void qpnpint_irq_ack(struct irq_data *d)
{ {
struct spmi_pmic_arb_dev *pa = irq_data_get_irq_chip_data(d); struct spmi_pmic_arb *pa = irq_data_get_irq_chip_data(d);
u8 irq = d->hwirq >> 8; u8 irq = d->hwirq >> 8;
u8 apid = d->hwirq; u8 apid = d->hwirq;
unsigned long flags; unsigned long flags;
@ -542,7 +541,7 @@ static void qpnpint_irq_ack(struct irq_data *d)
static void qpnpint_irq_mask(struct irq_data *d) static void qpnpint_irq_mask(struct irq_data *d)
{ {
struct spmi_pmic_arb_dev *pa = irq_data_get_irq_chip_data(d); struct spmi_pmic_arb *pa = irq_data_get_irq_chip_data(d);
u8 irq = d->hwirq >> 8; u8 irq = d->hwirq >> 8;
u8 apid = d->hwirq; u8 apid = d->hwirq;
unsigned long flags; unsigned long flags;
@ -564,7 +563,7 @@ static void qpnpint_irq_mask(struct irq_data *d)
static void qpnpint_irq_unmask(struct irq_data *d) static void qpnpint_irq_unmask(struct irq_data *d)
{ {
struct spmi_pmic_arb_dev *pa = irq_data_get_irq_chip_data(d); struct spmi_pmic_arb *pa = irq_data_get_irq_chip_data(d);
u8 irq = d->hwirq >> 8; u8 irq = d->hwirq >> 8;
u8 apid = d->hwirq; u8 apid = d->hwirq;
unsigned long flags; unsigned long flags;
@ -658,7 +657,7 @@ struct spmi_pmic_arb_irq_spec {
unsigned irq:3; unsigned irq:3;
}; };
static int search_mapping_table(struct spmi_pmic_arb_dev *pa, static int search_mapping_table(struct spmi_pmic_arb *pa,
struct spmi_pmic_arb_irq_spec *spec, struct spmi_pmic_arb_irq_spec *spec,
u8 *apid) u8 *apid)
{ {
@ -701,7 +700,7 @@ static int qpnpint_irq_domain_dt_translate(struct irq_domain *d,
unsigned long *out_hwirq, unsigned long *out_hwirq,
unsigned int *out_type) unsigned int *out_type)
{ {
struct spmi_pmic_arb_dev *pa = d->host_data; struct spmi_pmic_arb *pa = d->host_data;
struct spmi_pmic_arb_irq_spec spec; struct spmi_pmic_arb_irq_spec spec;
int err; int err;
u8 apid; u8 apid;
@ -748,7 +747,7 @@ static int qpnpint_irq_domain_map(struct irq_domain *d,
unsigned int virq, unsigned int virq,
irq_hw_number_t hwirq) irq_hw_number_t hwirq)
{ {
struct spmi_pmic_arb_dev *pa = d->host_data; struct spmi_pmic_arb *pa = d->host_data;
dev_dbg(&pa->spmic->dev, "virq = %u, hwirq = %lu\n", virq, hwirq); dev_dbg(&pa->spmic->dev, "virq = %u, hwirq = %lu\n", virq, hwirq);
@ -759,7 +758,7 @@ static int qpnpint_irq_domain_map(struct irq_domain *d,
} }
static int static int
pmic_arb_mode_v1(struct spmi_pmic_arb_dev *pa, u8 sid, u16 addr, mode_t *mode) pmic_arb_mode_v1(struct spmi_pmic_arb *pa, u8 sid, u16 addr, mode_t *mode)
{ {
*mode = S_IRUSR | S_IWUSR; *mode = S_IRUSR | S_IWUSR;
return 0; return 0;
@ -767,13 +766,13 @@ pmic_arb_mode_v1(struct spmi_pmic_arb_dev *pa, u8 sid, u16 addr, mode_t *mode)
/* v1 offset per ee */ /* v1 offset per ee */
static int static int
pmic_arb_offset_v1(struct spmi_pmic_arb_dev *pa, u8 sid, u16 addr, u32 *offset) pmic_arb_offset_v1(struct spmi_pmic_arb *pa, u8 sid, u16 addr, u32 *offset)
{ {
*offset = 0x800 + 0x80 * pa->channel; *offset = 0x800 + 0x80 * pa->channel;
return 0; return 0;
} }
static u16 pmic_arb_find_chan(struct spmi_pmic_arb_dev *pa, u16 ppid) static u16 pmic_arb_find_chan(struct spmi_pmic_arb *pa, u16 ppid)
{ {
u32 regval, offset; u32 regval, offset;
u16 chan; u16 chan;
@ -809,7 +808,7 @@ static u16 pmic_arb_find_chan(struct spmi_pmic_arb_dev *pa, u16 ppid)
} }
static int static int
pmic_arb_mode_v2(struct spmi_pmic_arb_dev *pa, u8 sid, u16 addr, mode_t *mode) pmic_arb_mode_v2(struct spmi_pmic_arb *pa, u8 sid, u16 addr, mode_t *mode)
{ {
u16 ppid = (sid << 8) | (addr >> 8); u16 ppid = (sid << 8) | (addr >> 8);
u16 chan; u16 chan;
@ -831,7 +830,7 @@ pmic_arb_mode_v2(struct spmi_pmic_arb_dev *pa, u8 sid, u16 addr, mode_t *mode)
/* v2 offset per ppid (chan) and per ee */ /* v2 offset per ppid (chan) and per ee */
static int static int
pmic_arb_offset_v2(struct spmi_pmic_arb_dev *pa, u8 sid, u16 addr, u32 *offset) pmic_arb_offset_v2(struct spmi_pmic_arb *pa, u8 sid, u16 addr, u32 *offset)
{ {
u16 ppid = (sid << 8) | (addr >> 8); u16 ppid = (sid << 8) | (addr >> 8);
u16 chan; u16 chan;
@ -926,7 +925,7 @@ static const struct irq_domain_ops pmic_arb_irq_domain_ops = {
static int spmi_pmic_arb_probe(struct platform_device *pdev) static int spmi_pmic_arb_probe(struct platform_device *pdev)
{ {
struct spmi_pmic_arb_dev *pa; struct spmi_pmic_arb *pa;
struct spmi_controller *ctrl; struct spmi_controller *ctrl;
struct resource *res; struct resource *res;
void __iomem *core; void __iomem *core;
@ -1110,7 +1109,7 @@ err_put_ctrl:
static int spmi_pmic_arb_remove(struct platform_device *pdev) static int spmi_pmic_arb_remove(struct platform_device *pdev)
{ {
struct spmi_controller *ctrl = platform_get_drvdata(pdev); struct spmi_controller *ctrl = platform_get_drvdata(pdev);
struct spmi_pmic_arb_dev *pa = spmi_controller_get_drvdata(ctrl); struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl);
spmi_controller_remove(ctrl); spmi_controller_remove(ctrl);
irq_set_chained_handler_and_data(pa->irq, NULL, NULL); irq_set_chained_handler_and_data(pa->irq, NULL, NULL);
irq_domain_remove(pa->domain); irq_domain_remove(pa->domain);