ASoC: wcd934x: Add support for codec MCLK2 enablement
Add support to enable codec MCLK2 which is used for 44.1KHz and its multiples sample rate audio playback. CRs-Fixed: 1054643 Change-Id: Id157439b2a46ac4fa54b4a768f9555cf390399b5 Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
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Phani Kumar Uppalapati
Gerrit - the friendly Code Review server
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1 changed files with 118 additions and 0 deletions
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@ -492,6 +492,8 @@ struct tavil_priv {
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/* SVS voting related */
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/* SVS voting related */
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struct mutex svs_mutex;
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struct mutex svs_mutex;
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int svs_ref_cnt;
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int svs_ref_cnt;
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int native_clk_users;
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};
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};
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static const struct tavil_reg_mask_val tavil_spkr_default[] = {
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static const struct tavil_reg_mask_val tavil_spkr_default[] = {
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@ -2198,6 +2200,62 @@ done:
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return rc;
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return rc;
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}
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}
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static int tavil_enable_native_supply(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
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struct tavil_priv *tavil = snd_soc_codec_get_drvdata(codec);
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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if (++tavil->native_clk_users == 1) {
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snd_soc_update_bits(codec, WCD934X_CLK_SYS_PLL_ENABLES,
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0x01, 0x01);
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/* Sleep 100 us as per HW sequence */
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usleep_range(100, 120);
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snd_soc_update_bits(codec, WCD934X_CLK_SYS_MCLK2_PRG1,
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0x06, 0x02);
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snd_soc_update_bits(codec, WCD934X_CLK_SYS_MCLK2_PRG1,
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0x01, 0x01);
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snd_soc_update_bits(codec, WCD934X_CODEC_RPM_CLK_GATE,
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0x04, 0x00);
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/* Sleep 30 us as per HW sequence */
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usleep_range(30, 50);
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snd_soc_update_bits(codec,
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WCD934X_CDC_CLK_RST_CTRL_MCLK_CONTROL,
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0x02, 0x02);
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snd_soc_update_bits(codec,
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WCD934X_CDC_CLK_RST_CTRL_FS_CNT_CONTROL,
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0x10, 0x10);
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}
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break;
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case SND_SOC_DAPM_PRE_PMD:
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if (tavil->native_clk_users &&
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(--tavil->native_clk_users == 0)) {
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snd_soc_update_bits(codec,
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WCD934X_CDC_CLK_RST_CTRL_FS_CNT_CONTROL,
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0x10, 0x00);
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snd_soc_update_bits(codec,
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WCD934X_CDC_CLK_RST_CTRL_MCLK_CONTROL,
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0x02, 0x00);
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snd_soc_update_bits(codec, WCD934X_CODEC_RPM_CLK_GATE,
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0x04, 0x04);
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snd_soc_update_bits(codec, WCD934X_CLK_SYS_MCLK2_PRG1,
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0x01, 0x00);
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snd_soc_update_bits(codec, WCD934X_CLK_SYS_MCLK2_PRG1,
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0x06, 0x00);
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snd_soc_update_bits(codec, WCD934X_CLK_SYS_PLL_ENABLES,
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0x01, 0x00);
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}
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break;
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}
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dev_dbg(codec->dev, "%s: native_clk_users: %d, event: %d\n",
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__func__, tavil->native_clk_users, event);
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return 0;
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}
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static int tavil_codec_enable_interpolator(struct snd_soc_dapm_widget *w,
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static int tavil_codec_enable_interpolator(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol,
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struct snd_kcontrol *kcontrol,
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int event)
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int event)
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@ -5050,6 +5108,26 @@ static const struct snd_soc_dapm_widget tavil_dapm_widgets[] = {
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SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
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SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
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tavil_codec_enable_rx_bias,
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tavil_codec_enable_rx_bias,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
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SND_SOC_DAPM_SUPPLY("RX INT1 NATIVE SUPPLY", SND_SOC_NOPM,
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INTERP_HPHL, 0, tavil_enable_native_supply,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_SUPPLY("RX INT2 NATIVE SUPPLY", SND_SOC_NOPM,
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INTERP_HPHR, 0, tavil_enable_native_supply,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_SUPPLY("RX INT3 NATIVE SUPPLY", SND_SOC_NOPM,
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INTERP_LO1, 0, tavil_enable_native_supply,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_SUPPLY("RX INT4 NATIVE SUPPLY", SND_SOC_NOPM,
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INTERP_LO2, 0, tavil_enable_native_supply,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_SUPPLY("RX INT7 NATIVE SUPPLY", SND_SOC_NOPM,
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INTERP_SPKR1, 0, tavil_enable_native_supply,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_SUPPLY("RX INT8 NATIVE SUPPLY", SND_SOC_NOPM,
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INTERP_SPKR2, 0, tavil_enable_native_supply,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
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};
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};
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static int tavil_get_channel_map(struct snd_soc_dai *dai,
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static int tavil_get_channel_map(struct snd_soc_dai *dai,
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@ -5801,6 +5879,31 @@ static const struct wcd_resmgr_cb tavil_resmgr_cb = {
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.cdc_rco_ctrl = __tavil_codec_internal_rco_ctrl,
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.cdc_rco_ctrl = __tavil_codec_internal_rco_ctrl,
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};
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};
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static const struct tavil_reg_mask_val tavil_codec_mclk2_defaults[] = {
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/*
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* PLL Settings:
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* Clock Root: MCLK2,
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* Clock Source: EXT_CLK,
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* Clock Destination: MCLK2
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* Clock Freq In: 19.2MHz,
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* Clock Freq Out: 11.2896MHz
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*/
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{WCD934X_CLK_SYS_MCLK2_PRG1, 0x60, 0x20},
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{WCD934X_CLK_SYS_INT_POST_DIV_REG0, 0xFF, 0x5E},
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{WCD934X_CLK_SYS_INT_POST_DIV_REG1, 0x1F, 0x1F},
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{WCD934X_CLK_SYS_INT_REF_DIV_REG0, 0xFF, 0x54},
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{WCD934X_CLK_SYS_INT_REF_DIV_REG1, 0xFF, 0x01},
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{WCD934X_CLK_SYS_INT_FILTER_REG1, 0x07, 0x04},
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{WCD934X_CLK_SYS_INT_PLL_L_VAL, 0xFF, 0x93},
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{WCD934X_CLK_SYS_INT_PLL_N_VAL, 0xFF, 0xFA},
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{WCD934X_CLK_SYS_INT_TEST_REG0, 0xFF, 0x90},
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{WCD934X_CLK_SYS_INT_PFD_CP_DSM_PROG, 0xFF, 0x7E},
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{WCD934X_CLK_SYS_INT_VCO_PROG, 0xFF, 0xF8},
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{WCD934X_CLK_SYS_INT_TEST_REG1, 0xFF, 0x68},
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{WCD934X_CLK_SYS_INT_LDO_LOCK_CFG, 0xFF, 0x40},
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{WCD934X_CLK_SYS_INT_DIG_LOCK_DET_CFG, 0xFF, 0x32},
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};
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static const struct tavil_reg_mask_val tavil_codec_reg_defaults[] = {
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static const struct tavil_reg_mask_val tavil_codec_reg_defaults[] = {
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{WCD934X_BIAS_VBG_FINE_ADJ, 0xFF, 0x75},
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{WCD934X_BIAS_VBG_FINE_ADJ, 0xFF, 0x75},
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{WCD934X_CODEC_CPR_SVS_CX_VDD, 0xFF, 0x7C}, /* value in svs mode */
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{WCD934X_CODEC_CPR_SVS_CX_VDD, 0xFF, 0x7C}, /* value in svs mode */
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@ -6248,6 +6351,18 @@ struct wcd934x_mbhc *tavil_soc_get_mbhc(struct snd_soc_codec *codec)
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}
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}
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EXPORT_SYMBOL(tavil_soc_get_mbhc);
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EXPORT_SYMBOL(tavil_soc_get_mbhc);
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static void tavil_mclk2_reg_defaults(struct tavil_priv *tavil)
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{
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int i;
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struct snd_soc_codec *codec = tavil->codec;
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/* MCLK2 configuration */
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for (i = 0; i < ARRAY_SIZE(tavil_codec_mclk2_defaults); i++)
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snd_soc_update_bits(codec, tavil_codec_mclk2_defaults[i].reg,
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tavil_codec_mclk2_defaults[i].mask,
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tavil_codec_mclk2_defaults[i].val);
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}
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static int tavil_soc_codec_probe(struct snd_soc_codec *codec)
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static int tavil_soc_codec_probe(struct snd_soc_codec *codec)
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{
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{
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struct wcd9xxx *control;
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struct wcd9xxx *control;
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@ -6366,6 +6481,9 @@ static int tavil_soc_codec_probe(struct snd_soc_codec *codec)
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INIT_DELAYED_WORK(&tavil->tx_mute_dwork[i].dwork,
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INIT_DELAYED_WORK(&tavil->tx_mute_dwork[i].dwork,
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tavil_tx_mute_update_callback);
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tavil_tx_mute_update_callback);
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}
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}
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tavil_mclk2_reg_defaults(tavil);
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snd_soc_dapm_sync(dapm);
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snd_soc_dapm_sync(dapm);
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tavil_wdsp_initialize(codec);
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tavil_wdsp_initialize(codec);
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