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msm: mdss: Fix AD configuration for single DSI case

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The default configuration for AD config_buffer_mode register is correct
for dual DSI case, but not for single DSI case. This change correctly
set the AD config_buffer_mode for single DSI case.

Change-Id: I8b1b665e027e925d607fda078cc453a5406f85ea
Signed-off-by: Ping Li <pingli@codeaurora.org>
This commit is contained in:
Ping Li 2016-04-04 17:58:54 -07:00 • committed by Bryan Huntsman
parent ea024084d7
commit 20804741fe
1 changed files with 4 additions and 2 deletions
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6
drivers/video/fbdev/msm/mdss_mdp_pp.c
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@ -5745,7 +5745,7 @@ static void pp_ad_init_write(struct mdss_mdp_ad *ad_hw, struct mdss_ad_info *ad,
struct mdss_mdp_ctl *ctl) struct mdss_mdp_ctl *ctl)
{ {
struct mdss_data_type *mdata = ctl->mdata; struct mdss_data_type *mdata = ctl->mdata;
u32 temp; u32 temp, cfg_buf_mode;
u32 frame_start, frame_end, procs_start, procs_end, tile_ctrl; u32 frame_start, frame_end, procs_start, procs_end, tile_ctrl;
u32 num; u32 num;
int side; int side;
@ -5831,20 +5831,22 @@ static void pp_ad_init_write(struct mdss_mdp_ad *ad_hw, struct mdss_ad_info *ad,
} }
procs_end -= 1; procs_end -= 1;
frame_end -= 1; frame_end -= 1;
cfg_buf_mode = 0x3;
} else { } else {
frame_start = 0x0; frame_start = 0x0;
frame_end = 0xFFFF; frame_end = 0xFFFF;
procs_start = 0x0; procs_start = 0x0;
procs_end = 0xFFFF; procs_end = 0xFFFF;
tile_ctrl = 0x0; tile_ctrl = 0x0;
cfg_buf_mode = 0x2;
} }
writel_relaxed(frame_start, base + MDSS_MDP_REG_AD_FRAME_START); writel_relaxed(frame_start, base + MDSS_MDP_REG_AD_FRAME_START);
writel_relaxed(frame_end, base + MDSS_MDP_REG_AD_FRAME_END); writel_relaxed(frame_end, base + MDSS_MDP_REG_AD_FRAME_END);
writel_relaxed(procs_start, base + MDSS_MDP_REG_AD_PROCS_START); writel_relaxed(procs_start, base + MDSS_MDP_REG_AD_PROCS_START);
writel_relaxed(procs_end, base + MDSS_MDP_REG_AD_PROCS_END); writel_relaxed(procs_end, base + MDSS_MDP_REG_AD_PROCS_END);
writel_relaxed(tile_ctrl, base + MDSS_MDP_REG_AD_TILE_CTRL); writel_relaxed(tile_ctrl, base + MDSS_MDP_REG_AD_TILE_CTRL);
writel_relaxed(cfg_buf_mode, base + MDSS_MDP_REG_AD_CFG_BUF);
} }
} }