evie/android_kernel_oneplus_msm8998
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drm/i915: Remove the broken flush_ring from page-flip

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This is already performed with the pipelined flush, so by the time we
schedule the flush in the page-flip, the ring is NULL and we OOPs
instead.

Reported-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson 2010-09-23 11:00:38 +01:00
parent 6ec3d0c0e9
commit 20f0cd55f6
3 changed files with 2 additions and 12 deletions
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5
drivers/gpu/drm/i915/i915_drv.h
View file

@ -1007,11 +1007,6 @@ int i915_gem_object_put_fence_reg(struct drm_gem_object *obj,
void i915_gem_retire_requests(struct drm_device *dev); void i915_gem_retire_requests(struct drm_device *dev);
void i915_gem_reset_lists(struct drm_device *dev); void i915_gem_reset_lists(struct drm_device *dev);
void i915_gem_clflush_object(struct drm_gem_object *obj); void i915_gem_clflush_object(struct drm_gem_object *obj);
void i915_gem_flush_ring(struct drm_device *dev,
struct drm_file *file_priv,
struct intel_ring_buffer *ring,
uint32_t invalidate_domains,
uint32_t flush_domains);
int i915_gem_object_set_domain(struct drm_gem_object *obj, int i915_gem_object_set_domain(struct drm_gem_object *obj,
uint32_t read_domains, uint32_t read_domains,
uint32_t write_domain); uint32_t write_domain);

2
drivers/gpu/drm/i915/i915_gem.c
View file

@ -1924,7 +1924,7 @@ i915_wait_request(struct drm_device *dev, uint32_t seqno,
return i915_do_wait_request(dev, seqno, 1, ring); return i915_do_wait_request(dev, seqno, 1, ring);
} }
void static void
i915_gem_flush_ring(struct drm_device *dev, i915_gem_flush_ring(struct drm_device *dev,
struct drm_file *file_priv, struct drm_file *file_priv,
struct intel_ring_buffer *ring, struct intel_ring_buffer *ring,

7
drivers/gpu/drm/i915/intel_display.c
View file

@ -5028,7 +5028,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
struct intel_unpin_work *work; struct intel_unpin_work *work;
unsigned long flags, offset; unsigned long flags, offset;
int pipe = intel_crtc->pipe; int pipe = intel_crtc->pipe;
u32 was_dirty, pf, pipesrc; u32 pf, pipesrc;
int ret; int ret;
work = kzalloc(sizeof *work, GFP_KERNEL); work = kzalloc(sizeof *work, GFP_KERNEL);
@ -5057,7 +5057,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
obj = intel_fb->obj; obj = intel_fb->obj;
mutex_lock(&dev->struct_mutex); mutex_lock(&dev->struct_mutex);
was_dirty = obj->write_domain & I915_GEM_GPU_DOMAINS;
ret = intel_pin_and_fence_fb_obj(dev, obj, true); ret = intel_pin_and_fence_fb_obj(dev, obj, true);
if (ret) if (ret)
goto cleanup_work; goto cleanup_work;
@ -5076,10 +5075,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
atomic_inc(&obj_priv->pending_flip); atomic_inc(&obj_priv->pending_flip);
work->pending_flip_obj = obj; work->pending_flip_obj = obj;
/* Schedule the pipelined flush */
if (was_dirty)
i915_gem_flush_ring(dev, NULL, obj_priv->ring, 0, was_dirty);
if (IS_GEN3(dev) || IS_GEN2(dev)) { if (IS_GEN3(dev) || IS_GEN2(dev)) {
u32 flip_mask; u32 flip_mask;