From 932d6cbc80d246d91fe8272fa050fcc6a596e217 Mon Sep 17 00:00:00 2001 From: Rahul Sharma Date: Thu, 4 Jan 2018 13:00:35 +0530 Subject: [PATCH] ARM: dts: msm: Add missing entries for XO on msm8996 agave Some camera entries are missing in camera dtsi files which are causing failure on LA XO shutdown. Added all missing automotive camera entries to dtsi files which are used by camera driver during LA XO shutdown. Change-Id: I633ed0788bb1dd6c512c6d6349c3750c19bcdd26 Signed-off-by: Rahul Sharma --- arch/arm/boot/dts/qcom/msm8996-agave-adp.dtsi | 24 ++++++++++++++--- arch/arm/boot/dts/qcom/msm8996-auto-cdp.dtsi | 26 +++++++++++++++---- 2 files changed, 41 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/qcom/msm8996-agave-adp.dtsi b/arch/arm/boot/dts/qcom/msm8996-agave-adp.dtsi index 21063a13556d..eb1f821234ba 100644 --- a/arch/arm/boot/dts/qcom/msm8996-agave-adp.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996-agave-adp.dtsi @@ -815,7 +815,8 @@ mmagic-supply = <&gdsc_mmagic_camss>; gdscr-supply = <&gdsc_camss_top>; vfe0-vdd-supply = <&gdsc_vfe0>; - qcom,cam-vreg-name = "mmagic", "gdscr", "vfe0-vdd"; + vfe1-vdd-supply = <&gdsc_vfe1>; + qcom,cam-vreg-name = "mmagic", "gdscr", "vfe0-vdd", "vfe1-vdd"; clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>, <&clock_mmss clk_camss_top_ahb_clk>, <&clock_mmss clk_cci_clk_src>, @@ -825,12 +826,16 @@ <&clock_mmss clk_mmagic_camss_axi_clk>, <&clock_mmss clk_camss_vfe_ahb_clk>, <&clock_mmss clk_camss_vfe0_ahb_clk>, + <&clock_mmss clk_camss_vfe1_ahb_clk>, <&clock_mmss clk_camss_vfe_axi_clk>, <&clock_mmss clk_camss_vfe0_stream_clk>, + <&clock_mmss clk_camss_vfe1_stream_clk>, <&clock_mmss clk_smmu_vfe_axi_clk>, <&clock_mmss clk_smmu_vfe_ahb_clk>, <&clock_mmss clk_camss_csi_vfe0_clk>, + <&clock_mmss clk_camss_csi_vfe1_clk>, <&clock_mmss clk_vfe0_clk_src>, + <&clock_mmss clk_vfe1_clk_src>, <&clock_mmss clk_camss_csi_vfe0_clk>, <&clock_mmss clk_camss_csi2_ahb_clk>, <&clock_mmss clk_camss_csi2_clk>, @@ -839,7 +844,8 @@ <&clock_mmss clk_camss_csi2phytimer_clk>, <&clock_mmss clk_camss_csi2rdi_clk>, <&clock_mmss clk_camss_ispif_ahb_clk>, - <&clock_mmss clk_camss_vfe0_clk>; + <&clock_mmss clk_camss_vfe0_clk>, + <&clock_mmss clk_camss_vfe1_clk>; clock-names = "mmss_mmagic_ahb_clk", "camss_top_ahb_clk", @@ -850,12 +856,16 @@ "mmagic_camss_axi_clk", "camss_vfe_ahb_clk", "camss_vfe0_ahb_clk", + "camss_vfe1_ahb_clk", "camss_vfe_axi_clk", "camss_vfe0_stream_clk", + "camss_vfe1_stream_clk", "smmu_vfe_axi_clk", "smmu_vfe_ahb_clk", "camss_csi_vfe0_clk", + "camss_csi_vfe1_clk", "vfe0_clk_src", + "vfe1_clk_src", "camss_csi_vfe0_clk", "camss_csi2_ahb_clk", "camss_csi2_clk", @@ -864,7 +874,8 @@ "camss_csi2phytimer_clk", "camss_csi2rdi_clk", "camss_ispif_ahb_clk", - "clk_camss_vfe0_clk"; + "clk_camss_vfe0_clk", + "clk_camss_vfe1_clk"; qcom,clock-rates = <19200000 19200000 @@ -875,12 +886,16 @@ 0 0 0 + 0 320000000 0 0 0 0 - 19200000 + 0 + 0 + 320000000 + 320000000 0 0 200000000 @@ -889,6 +904,7 @@ 200000000 200000000 0 + 100000000 100000000>; }; diff --git a/arch/arm/boot/dts/qcom/msm8996-auto-cdp.dtsi b/arch/arm/boot/dts/qcom/msm8996-auto-cdp.dtsi index e4d18854f361..8eee428355db 100644 --- a/arch/arm/boot/dts/qcom/msm8996-auto-cdp.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996-auto-cdp.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -580,7 +580,8 @@ mmagic-supply = <&gdsc_mmagic_camss>; gdscr-supply = <&gdsc_camss_top>; vfe0-vdd-supply = <&gdsc_vfe0>; - qcom,cam-vreg-name = "mmagic", "gdscr", "vfe0-vdd"; + vfe1-vdd-supply = <&gdsc_vfe1>; + qcom,cam-vreg-name = "mmagic", "gdscr", "vfe0-vdd", "vfe1-vdd"; clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>, <&clock_mmss clk_camss_top_ahb_clk>, <&clock_mmss clk_cci_clk_src>, @@ -590,12 +591,16 @@ <&clock_mmss clk_mmagic_camss_axi_clk>, <&clock_mmss clk_camss_vfe_ahb_clk>, <&clock_mmss clk_camss_vfe0_ahb_clk>, + <&clock_mmss clk_camss_vfe1_ahb_clk>, <&clock_mmss clk_camss_vfe_axi_clk>, <&clock_mmss clk_camss_vfe0_stream_clk>, + <&clock_mmss clk_camss_vfe1_stream_clk>, <&clock_mmss clk_smmu_vfe_axi_clk>, <&clock_mmss clk_smmu_vfe_ahb_clk>, <&clock_mmss clk_camss_csi_vfe0_clk>, + <&clock_mmss clk_camss_csi_vfe1_clk>, <&clock_mmss clk_vfe0_clk_src>, + <&clock_mmss clk_vfe1_clk_src>, <&clock_mmss clk_camss_csi_vfe0_clk>, <&clock_mmss clk_camss_csi2_ahb_clk>, <&clock_mmss clk_camss_csi2_clk>, @@ -604,7 +609,8 @@ <&clock_mmss clk_camss_csi2phytimer_clk>, <&clock_mmss clk_camss_csi2rdi_clk>, <&clock_mmss clk_camss_ispif_ahb_clk>, - <&clock_mmss clk_camss_vfe0_clk>; + <&clock_mmss clk_camss_vfe0_clk>, + <&clock_mmss clk_camss_vfe1_clk>; clock-names = "mmss_mmagic_ahb_clk", "camss_top_ahb_clk", @@ -615,12 +621,16 @@ "mmagic_camss_axi_clk", "camss_vfe_ahb_clk", "camss_vfe0_ahb_clk", + "camss_vfe1_ahb_clk", "camss_vfe_axi_clk", "camss_vfe0_stream_clk", + "camss_vfe1_stream_clk", "smmu_vfe_axi_clk", "smmu_vfe_ahb_clk", "camss_csi_vfe0_clk", + "camss_csi_vfe1_clk", "vfe0_clk_src", + "vfe1_clk_src", "camss_csi_vfe0_clk", "camss_csi2_ahb_clk", "camss_csi2_clk", @@ -629,7 +639,8 @@ "camss_csi2phytimer_clk", "camss_csi2rdi_clk", "camss_ispif_ahb_clk", - "clk_camss_vfe0_clk"; + "clk_camss_vfe0_clk", + "clk_camss_vfe1_clk"; qcom,clock-rates = <19200000 19200000 @@ -640,12 +651,16 @@ 0 0 0 + 0 320000000 0 0 0 0 - 19200000 + 0 + 0 + 320000000 + 320000000 0 0 200000000 @@ -654,6 +669,7 @@ 200000000 200000000 0 + 100000000 100000000>; };