staging: comedi: ni_pcidio: Support trailing edge external trigger
This patch is ported over by me (Ian Abbott) from the out-of-tree Comedi git repository at "git://comedi.org/git/comedi/comedi.git". The original patch is by Nicholas Nell. The patch adds support for trailing (falling) edge external triggers for scans in asynchronous command support in the ni_pcidio driver. This is supported at least on the PCI-DIO_32HS and PCI-6533 boards; not sure about the other boards. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Cc: Nicholas Nell <nicholas.nell@colorado.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -30,7 +30,7 @@ Status: works
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Devices: [National Instruments] PCI-DIO-32HS (ni_pcidio), PXI-6533,
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PCI-DIO-96, PCI-DIO-96B, PXI-6508, PCI-6503, PCI-6503B, PCI-6503X,
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PXI-6503, PCI-6533, PCI-6534
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Updated: Sun, 21 Apr 2002 21:03:38 -0700
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Updated: Mon, 09 Jan 2012 14:27:23 +0000
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The DIO-96 appears as four 8255 subdevices. See the 8255
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driver notes for details.
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@ -42,6 +42,11 @@ supports simple digital I/O; no handshaking is supported.
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DMA mostly works for the PCI-DIO32HS, but only in timed input mode.
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The PCI-DIO-32HS/PCI-6533 has a configurable external trigger. Setting
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scan_begin_arg to 0 or CR_EDGE triggers on the leading edge. Setting
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scan_begin_arg to CR_INVERT or (CR_EDGE | CR_INVERT) triggers on the
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trailing edge.
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This driver could be easily modified to support AT-MIO32HS and
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AT-MIO96.
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@ -845,8 +850,8 @@ static int ni_pcidio_cmdtest(struct comedi_device *dev,
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} else {
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/* TRIG_EXT */
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/* should be level/edge, hi/lo specification here */
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if (cmd->scan_begin_arg != 0) {
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cmd->scan_begin_arg = 0;
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if ((cmd->scan_begin_arg & ~(CR_EDGE | CR_INVERT)) != 0) {
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cmd->scan_begin_arg &= (CR_EDGE | CR_INVERT);
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err++;
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}
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}
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@ -961,7 +966,13 @@ static int ni_pcidio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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writeb(0, devpriv->mite->daq_io_addr + Sequence);
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writeb(0x00, devpriv->mite->daq_io_addr + ReqReg);
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writeb(4, devpriv->mite->daq_io_addr + BlockMode);
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writeb(0, devpriv->mite->daq_io_addr + LinePolarities);
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if (!(cmd->scan_begin_arg & CR_INVERT)) {
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/* Leading Edge pulse mode */
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writeb(0, devpriv->mite->daq_io_addr + LinePolarities);
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} else {
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/* Trailing Edge pulse mode */
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writeb(2, devpriv->mite->daq_io_addr + LinePolarities);
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}
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writeb(0x00, devpriv->mite->daq_io_addr + AckSer);
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writel(1, devpriv->mite->daq_io_addr + StartDelay);
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writeb(1, devpriv->mite->daq_io_addr + ReqDelay);
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