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staging: comedi: ni_tio: tidy up ni_tio_init_counter()

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This function is called to initialize/reset a gpct counter during a
comedi drivers (*attach).

For aesthetics, move this exported function toward the end of the file.

Tidy up the functions a bit by just open coding the '0x0' values used
to initialize some of the registers.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten 2014-07-24 10:14:52 -07:00 • committed by Greg Kroah-Hartman
parent 8477c5d4ba
commit 25e529b0f4
1 changed files with 38 additions and 43 deletions
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81
drivers/staging/comedi/drivers/ni_tio.c
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@ -206,49 +206,6 @@ static void ni_tio_reset_count_and_disarm(struct ni_gpct *counter)
write_register(counter, Gi_Reset_Bit(cidx), NITIO_RESET_REG(cidx));
}
void ni_tio_init_counter(struct ni_gpct *counter)
{
struct ni_gpct_device *counter_dev = counter->counter_dev;
unsigned cidx = counter->counter_index;
ni_tio_reset_count_and_disarm(counter);
/* initialize counter registers */
counter_dev->regs[NITIO_AUTO_INC_REG(cidx)] = 0x0;
write_register(counter, counter_dev->regs[NITIO_AUTO_INC_REG(cidx)],
NITIO_AUTO_INC_REG(cidx));
ni_tio_set_bits(counter, NITIO_CMD_REG(cidx),
~0, Gi_Synchronize_Gate_Bit);
ni_tio_set_bits(counter, NITIO_MODE_REG(cidx), ~0, 0);
counter_dev->regs[NITIO_LOADA_REG(cidx)] = 0x0;
write_register(counter, counter_dev->regs[NITIO_LOADA_REG(cidx)],
NITIO_LOADA_REG(cidx));
counter_dev->regs[NITIO_LOADB_REG(cidx)] = 0x0;
write_register(counter, counter_dev->regs[NITIO_LOADB_REG(cidx)],
NITIO_LOADB_REG(cidx));
ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), ~0, 0);
if (ni_tio_counting_mode_registers_present(counter_dev))
ni_tio_set_bits(counter, NITIO_CNT_MODE_REG(cidx), ~0, 0);
if (ni_tio_second_gate_registers_present(counter_dev)) {
counter_dev->regs[NITIO_GATE2_REG(cidx)] = 0x0;
write_register(counter,
counter_dev->regs[NITIO_GATE2_REG(cidx)],
NITIO_GATE2_REG(cidx));
}
ni_tio_set_bits(counter, NITIO_DMA_CFG_REG(cidx), ~0, 0x0);
ni_tio_set_bits(counter, NITIO_INT_ENA_REG(cidx), ~0, 0x0);
}
EXPORT_SYMBOL_GPL(ni_tio_init_counter);
static unsigned int ni_tio_counter_status(struct ni_gpct *counter)
{
unsigned cidx = counter->counter_index;
@ -1475,6 +1432,44 @@ int ni_tio_insn_write(struct comedi_device *dev,
}
EXPORT_SYMBOL_GPL(ni_tio_insn_write);
void ni_tio_init_counter(struct ni_gpct *counter)
{
struct ni_gpct_device *counter_dev = counter->counter_dev;
unsigned cidx = counter->counter_index;
ni_tio_reset_count_and_disarm(counter);
/* initialize counter registers */
counter_dev->regs[NITIO_AUTO_INC_REG(cidx)] = 0x0;
write_register(counter, 0x0, NITIO_AUTO_INC_REG(cidx));
ni_tio_set_bits(counter, NITIO_CMD_REG(cidx),
~0, Gi_Synchronize_Gate_Bit);
ni_tio_set_bits(counter, NITIO_MODE_REG(cidx), ~0, 0);
counter_dev->regs[NITIO_LOADA_REG(cidx)] = 0x0;
write_register(counter, 0x0, NITIO_LOADA_REG(cidx));
counter_dev->regs[NITIO_LOADB_REG(cidx)] = 0x0;
write_register(counter, 0x0, NITIO_LOADB_REG(cidx));
ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), ~0, 0);
if (ni_tio_counting_mode_registers_present(counter_dev))
ni_tio_set_bits(counter, NITIO_CNT_MODE_REG(cidx), ~0, 0);
if (ni_tio_second_gate_registers_present(counter_dev)) {
counter_dev->regs[NITIO_GATE2_REG(cidx)] = 0x0;
write_register(counter, 0x0, NITIO_GATE2_REG(cidx));
}
ni_tio_set_bits(counter, NITIO_DMA_CFG_REG(cidx), ~0, 0x0);
ni_tio_set_bits(counter, NITIO_INT_ENA_REG(cidx), ~0, 0x0);
}
EXPORT_SYMBOL_GPL(ni_tio_init_counter);
struct ni_gpct_device *
ni_gpct_device_construct(struct comedi_device *dev,
void (*write_register)(struct ni_gpct *counter,