evie/android_kernel_oneplus_msm8998
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scsi: ufs-msm: inform PHY about analog rails power down

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UFS PHY analog rails (VDDA_PHY_0P9 & VDDA_PLL_1P8) can be power collapsed
while the UFS link is in hibern8 state but PHY needs to be informed about
the power collapse by writing 0 to its power down control register. If PHY
is not informed about it, hibern8 exit might fail. This fixes this problem.

Change-Id: If897681569ca0073f2075acf8a9014da8d762827
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
This commit is contained in:
Subhash Jadavani 2014-01-10 14:23:52 -08:00 • committed by David Keitel
parent 601d661911
commit 26c2a47e5c
1 changed files with 13 additions and 0 deletions
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13
drivers/scsi/ufs/ufs-msm.c
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@ -1754,6 +1754,13 @@ static int msm_ufs_phy_power_on(struct msm_ufs_phy *phy)
if (err)
goto out;
writel_relaxed(0x1, phy->mmio + UFS_PHY_POWER_DOWN_CONTROL);
/*
* Before any transactions involving PHY, ensure PHY knows that it's
* analog rail is powered ON.
*/
mb();
/* vdda_pll also enables ref clock LDOs so enable it first */
err = msm_ufs_phy_enable_vreg(phy, &phy->vdda_pll);
if (err)
@ -2013,6 +2020,12 @@ static int msm_ufs_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
*/
if (!ufshcd_is_link_active(hba)) {
msm_ufs_disable_phy_ref_clk(phy);
writel_relaxed(0x0, phy->mmio + UFS_PHY_POWER_DOWN_CONTROL);
/*
* Ensure PHY knows that PHY analog rail is going to be powered
* down.
*/
mb();
msm_ufs_phy_disable_vreg(phy, &phy->vdda_phy);
msm_ufs_phy_disable_vreg(phy, &phy->vdda_pll);
}