mtd: nand: omap: add support for BCH16_ECC - GPMC driver updates
This patch add support for BCH16_ECC in GPMC (controller) driver: - extends configuration space to include BCH16 registers - extends parsing of DT binding for selecting BCH16 ecc-scheme Signed-off-by: Pekon Gupta <pekon@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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2 changed files with 20 additions and 0 deletions
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@ -68,6 +68,9 @@
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#define GPMC_ECC_BCH_RESULT_1 0x244 /* not available on OMAP2 */
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#define GPMC_ECC_BCH_RESULT_1 0x244 /* not available on OMAP2 */
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#define GPMC_ECC_BCH_RESULT_2 0x248 /* not available on OMAP2 */
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#define GPMC_ECC_BCH_RESULT_2 0x248 /* not available on OMAP2 */
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#define GPMC_ECC_BCH_RESULT_3 0x24c /* not available on OMAP2 */
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#define GPMC_ECC_BCH_RESULT_3 0x24c /* not available on OMAP2 */
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#define GPMC_ECC_BCH_RESULT_4 0x300 /* not available on OMAP2 */
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#define GPMC_ECC_BCH_RESULT_5 0x304 /* not available on OMAP2 */
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#define GPMC_ECC_BCH_RESULT_6 0x308 /* not available on OMAP2 */
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/* GPMC ECC control settings */
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/* GPMC ECC control settings */
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#define GPMC_ECC_CTRL_ECCCLEAR 0x100
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#define GPMC_ECC_CTRL_ECCCLEAR 0x100
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@ -666,6 +669,12 @@ void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
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GPMC_BCH_SIZE * i;
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GPMC_BCH_SIZE * i;
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reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 +
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reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 +
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GPMC_BCH_SIZE * i;
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GPMC_BCH_SIZE * i;
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reg->gpmc_bch_result4[i] = gpmc_base + GPMC_ECC_BCH_RESULT_4 +
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i * GPMC_BCH_SIZE;
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reg->gpmc_bch_result5[i] = gpmc_base + GPMC_ECC_BCH_RESULT_5 +
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i * GPMC_BCH_SIZE;
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reg->gpmc_bch_result6[i] = gpmc_base + GPMC_ECC_BCH_RESULT_6 +
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i * GPMC_BCH_SIZE;
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}
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}
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}
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}
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@ -1401,6 +1410,12 @@ static int gpmc_probe_nand_child(struct platform_device *pdev,
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else
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else
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gpmc_nand_data->ecc_opt =
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gpmc_nand_data->ecc_opt =
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OMAP_ECC_BCH8_CODE_HW_DETECTION_SW;
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OMAP_ECC_BCH8_CODE_HW_DETECTION_SW;
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else if (!strcmp(s, "bch16"))
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if (gpmc_nand_data->elm_of_node)
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gpmc_nand_data->ecc_opt =
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OMAP_ECC_BCH16_CODE_HW;
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else
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pr_err("%s: BCH16 requires ELM support\n", __func__);
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else
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else
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pr_err("%s: ti,nand-ecc-opt invalid value\n", __func__);
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pr_err("%s: ti,nand-ecc-opt invalid value\n", __func__);
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@ -31,6 +31,8 @@ enum omap_ecc {
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OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
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OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
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/* 8-bit ECC calculation by GPMC, Error detection by ELM */
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/* 8-bit ECC calculation by GPMC, Error detection by ELM */
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OMAP_ECC_BCH8_CODE_HW,
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OMAP_ECC_BCH8_CODE_HW,
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/* 16-bit ECC calculation by GPMC, Error detection by ELM */
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OMAP_ECC_BCH16_CODE_HW,
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};
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};
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struct gpmc_nand_regs {
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struct gpmc_nand_regs {
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@ -50,6 +52,9 @@ struct gpmc_nand_regs {
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void __iomem *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
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void __iomem *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
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void __iomem *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
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void __iomem *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
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void __iomem *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
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void __iomem *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
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void __iomem *gpmc_bch_result4[GPMC_BCH_NUM_REMAINDER];
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void __iomem *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER];
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void __iomem *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER];
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};
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};
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struct omap_nand_platform_data {
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struct omap_nand_platform_data {
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