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clk: qcom: Update ops for esc clock source

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Some of the display panels requires various
escape clock frequencies for its operation.
Add support for the same by update esc clock
ops to clk_esc_ops.

Change-Id: I50cb79863cfdf880ba72e73a98905ecd87a08474
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
This commit is contained in:
Amit Nischal 2017-03-10 16:46:36 +05:30
parent e429572fa3
commit 2bb28272df
1 changed files with 2 additions and 4 deletions
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6
drivers/clk/qcom/mmcc-sdm660.c
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@ -978,12 +978,11 @@ static struct clk_rcg2 esc0_clk_src = {
.mnd_width = 0, .mnd_width = 0,
.hid_width = 5, .hid_width = 5,
.parent_map = mmcc_parent_map_1, .parent_map = mmcc_parent_map_1,
.freq_tbl = ftbl_dp_aux_clk_src,
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "esc0_clk_src", .name = "esc0_clk_src",
.parent_names = mmcc_parent_names_1, .parent_names = mmcc_parent_names_1,
.num_parents = 4, .num_parents = 4,
.ops = &clk_rcg2_ops, .ops = &clk_esc_ops,
VDD_DIG_FMAX_MAP1( VDD_DIG_FMAX_MAP1(
LOWER, 19200000), LOWER, 19200000),
}, },
@ -994,12 +993,11 @@ static struct clk_rcg2 esc1_clk_src = {
.mnd_width = 0, .mnd_width = 0,
.hid_width = 5, .hid_width = 5,
.parent_map = mmcc_parent_map_1, .parent_map = mmcc_parent_map_1,
.freq_tbl = ftbl_dp_aux_clk_src,
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "esc1_clk_src", .name = "esc1_clk_src",
.parent_names = mmcc_parent_names_1, .parent_names = mmcc_parent_names_1,
.num_parents = 4, .num_parents = 4,
.ops = &clk_rcg2_ops, .ops = &clk_esc_ops,
VDD_DIG_FMAX_MAP1( VDD_DIG_FMAX_MAP1(
LOWER, 19200000), LOWER, 19200000),
}, },