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UPSTREAM: MIPS: CPC: Add start, stop and running CM3 CPC registers

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Add the new CM3 registers for controlling bringing up and powering down
VPs on MIPSR6 cores.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12330/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
(cherry picked from commit 88036557bac3c831a564dcd6c860da48ae55756f)
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Markos Chandras 2016-02-03 03:15:24 +00:00 • committed by Greg Kroah-Hartman
parent 55454ca1bd
commit 2ea248c38c
1 changed files with 3 additions and 0 deletions
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3
arch/mips/include/asm/mips-cpc.h
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@ -106,6 +106,9 @@ BUILD_CPC_R_(revision, MIPS_CPC_GCB_OFS + 0x20)
BUILD_CPC_Cx_RW(cmd, 0x00)
BUILD_CPC_Cx_RW(stat_conf, 0x08)
BUILD_CPC_Cx_RW(other, 0x10)
BUILD_CPC_Cx_RW(vp_stop, 0x20)
BUILD_CPC_Cx_RW(vp_run, 0x28)
BUILD_CPC_Cx_RW(vp_running, 0x30)
/* CPC_Cx_CMD register fields */
#define CPC_Cx_CMD_SHF 0