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pwm: qpnp: Enable glitch removal selectively

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Currently, glitch removal is enabled by default when the PWM
channel is configured. However, that adds delay to the PWM
output which is undesirable for longer PWM period. Disable the
glitch removal when PWM is configured and enable it after the
PWM is enabled.

CRs-Fixed: 1009283
Change-Id: Ibf4abb99e5e3e7aa9a9212b57094876f6ec6e9f0
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
This commit is contained in:
Subbaraman Narayanamurthy 2016-05-04 18:45:28 -07:00 • committed by Kyle Yan
parent 89b7331522
commit 2f79eb0e53
1 changed files with 38 additions and 13 deletions
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51
drivers/pwm/pwm-qpnp.c
View file

@ -745,11 +745,27 @@ static int qpnp_lpg_configure_pattern(struct qpnp_pwm_chip *chip)
QPNP_LPG_PATTERN_CONFIG), 1, chip);
}
static int qpnp_lpg_glitch_removal(struct qpnp_pwm_chip *chip, bool enable)
{
struct qpnp_lpg_config *lpg_config = &chip->lpg_config;
u8 value, mask;
qpnp_set_pwm_type_config(&value, enable ? 1 : 0, 0, 0, 0);
mask = QPNP_EN_GLITCH_REMOVAL_MASK | QPNP_EN_FULL_SCALE_MASK |
QPNP_EN_PHASE_STAGGER_MASK | QPNP_PHASE_STAGGER_MASK;
pr_debug("pwm_type_config: %d\n", value);
return qpnp_lpg_save_and_write(value, mask,
&chip->qpnp_lpg_registers[QPNP_LPG_PWM_TYPE_CONFIG],
SPMI_LPG_REG_ADDR(lpg_config->base_addr,
QPNP_LPG_PWM_TYPE_CONFIG), 1, chip);
}
static int qpnp_lpg_configure_pwm(struct qpnp_pwm_chip *chip)
{
struct qpnp_lpg_config *lpg_config = &chip->lpg_config;
int rc;
u8 value, mask;
int rc;
pr_debug("pwm_size_clk: %d\n",
chip->qpnp_lpg_registers[QPNP_LPG_PWM_SIZE_CLK]);
@ -770,16 +786,13 @@ static int qpnp_lpg_configure_pwm(struct qpnp_pwm_chip *chip)
if (rc)
return rc;
qpnp_set_pwm_type_config(&value, 1, 0, 0, 0);
mask = QPNP_EN_GLITCH_REMOVAL_MASK | QPNP_EN_FULL_SCALE_MASK |
QPNP_EN_PHASE_STAGGER_MASK | QPNP_PHASE_STAGGER_MASK;
pr_debug("pwm_type_config: %d\n", value);
return qpnp_lpg_save_and_write(value, mask,
&chip->qpnp_lpg_registers[QPNP_LPG_PWM_TYPE_CONFIG],
SPMI_LPG_REG_ADDR(lpg_config->base_addr,
QPNP_LPG_PWM_TYPE_CONFIG), 1, chip);
/* Disable glitch removal when LPG/PWM is configured */
rc = qpnp_lpg_glitch_removal(chip, false);
if (rc) {
pr_err("Error in disabling glitch control, rc=%d\n", rc);
return rc;
}
return rc;
}
static int qpnp_configure_pwm_control(struct qpnp_pwm_chip *chip)
@ -1204,8 +1217,20 @@ static int _pwm_config(struct qpnp_pwm_chip *chip,
if (rc)
goto out;
if (!rc && chip->enabled)
if (!rc && chip->enabled) {
rc = qpnp_lpg_configure_pwm_state(chip, QPNP_PWM_ENABLE);
if (rc) {
pr_err("Error in configuring pwm state, rc=%d\n", rc);
return rc;
}
/* Enable the glitch removal after PWM is enabled */
rc = qpnp_lpg_glitch_removal(chip, true);
if (rc) {
pr_err("Error in enabling glitch control, rc=%d\n", rc);
return rc;
}
}
pr_debug("duty/period=%u/%u %s: pwm_value=%d (of %d)\n",
(unsigned)duty_value, (unsigned)period_value,