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staging: comedi: rtd520: use plx register map from plx9080.h

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Use the register map defines for the PLX9080 found in plx9080.h
instead of the custom named defines in rtd520.h.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten 2013-03-26 14:58:08 -07:00 • committed by Greg Kroah-Hartman
parent 77c08dbcf4
commit 2fb0e84909
2 changed files with 4 additions and 23 deletions
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8
drivers/staging/comedi/drivers/rtd520.c
View file

@ -1210,7 +1210,7 @@ static void rtd_reset(struct comedi_device *dev)
writel(0, devpriv->las0 + LAS0_BOARD_RESET);
udelay(100); /* needed? */
writel(0, devpriv->lcfg + LCFG_ITCSR);
writel(0, devpriv->lcfg + PLX_INTRCS_REG);
devpriv->intMask = 0;
writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
devpriv->intClearMask = ~0;
@ -1362,7 +1362,7 @@ static int rtd_auto_attach(struct comedi_device *dev,
devpriv->fifoLen = ret;
if (dev->irq)
writel(ICS_PIE | ICS_PLIE, devpriv->lcfg + LCFG_ITCSR);
writel(ICS_PIE | ICS_PLIE, devpriv->lcfg + PLX_INTRCS_REG);
dev_info(dev->class_dev, "%s attached\n", dev->board_name);
@ -1378,9 +1378,9 @@ static void rtd_detach(struct comedi_device *dev)
if (devpriv->las0 && devpriv->lcfg)
rtd_reset(dev);
if (dev->irq) {
writel(readl(devpriv->lcfg + LCFG_ITCSR) &
writel(readl(devpriv->lcfg + PLX_INTRCS_REG) &
~(ICS_PLIE | ICS_DMA0_E | ICS_DMA1_E),
devpriv->lcfg + LCFG_ITCSR);
devpriv->lcfg + PLX_INTRCS_REG);
free_irq(dev->irq, dev);
}
if (devpriv->las0)

19
drivers/staging/comedi/drivers/rtd520.h
View file

@ -113,25 +113,6 @@
#define LAS1_DAC1_FIFO 0x0008 /* D/A1 FIFO (16bit) */
#define LAS1_DAC2_FIFO 0x000c /* D/A2 FIFO (16bit) */
/*
* PLX 9080 local config & runtime registers
*/
#define LCFG_ITCSR 0x0068 /* Interrupt Control/Status */
#define LCFG_DMAMODE0 0x0080 /* DMA0 Mode */
#define LCFG_DMAPADR0 0x0084 /* DMA0 PCI Address */
#define LCFG_DMALADR0 0x0088 /* DMA0 Local Address */
#define LCFG_DMASIZ0 0x008c /* DMA0 Transfer Size (Bytes) */
#define LCFG_DMADPR0 0x0090 /* DMA0 Descriptor Pointer */
#define LCFG_DMAMODE1 0x0094 /* DMA1 Mode */
#define LCFG_DMAPADR1 0x0098 /* DMA1 PCI Address */
#define LCFG_DMALADR1 0x009c /* DMA1 Local Address */
#define LCFG_DMASIZ1 0x00a0 /* DMA1 Transfer Size (Bytes) */
#define LCFG_DMADPR1 0x00a4 /* DMA1 Descriptor Pointer */
#define LCFG_DMACSR0 0x00a8 /* DMA0 Command/Status */
#define LCFG_DMACSR1 0x00a9 /* DMA0 Command/Status */
#define LCFG_DMAARB 0x00ac /* DMA Arbitration */
#define LCFG_DMATHR 0x00b0 /* DMA Threshold */
/* FIFO Status Word Bits (RtdFifoStatus) */
#define FS_DAC1_NOT_EMPTY (1 << 0) /* DAC1 FIFO not empty */
#define FS_DAC1_HEMPTY (1 << 1) /* DAC1 FIFO half empty */