From 19e1a4c6c4627e47ab217cf31964b4c27e121dfe Mon Sep 17 00:00:00 2001 From: Abhinav Kumar Date: Fri, 22 Dec 2017 00:02:08 -0800 Subject: [PATCH] drm/msm/sde: clear blend stages of all mixers Currently the blending stages of all the mixers is not cleared when switching mixer configurations or configuring solid fill mode. As a result stale pipes remain connected when switching mixer configurations causing smmu faults. Fix the logic to clear the blend stages of all the mixers. Change-Id: I1a3c5a020d6bc04657cb5357a2cd60c1a53ce4c7 Signed-off-by: Abhinav Kumar --- drivers/gpu/drm/msm/sde/sde_hw_ctl.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/sde/sde_hw_ctl.c b/drivers/gpu/drm/msm/sde/sde_hw_ctl.c index 270e79a774b2..46e2a13cecc4 100644 --- a/drivers/gpu/drm/msm/sde/sde_hw_ctl.c +++ b/drivers/gpu/drm/msm/sde/sde_hw_ctl.c @@ -21,6 +21,9 @@ (0x40 + (((lm) - LM_0) * 0x004)) #define CTL_LAYER_EXT2(lm) \ (0x70 + (((lm) - LM_0) * 0x004)) +#define CTL_LAYER_EXT3(lm) \ + (0xA0 + (((lm) - LM_0) * 0x004)) + #define CTL_TOP 0x014 #define CTL_FLUSH 0x018 #define CTL_START 0x01C @@ -315,8 +318,12 @@ static void sde_hw_ctl_clear_all_blendstages(struct sde_hw_ctl *ctx) int i; for (i = 0; i < ctx->mixer_count; i++) { - SDE_REG_WRITE(c, CTL_LAYER(LM_0 + i), 0); - SDE_REG_WRITE(c, CTL_LAYER_EXT(LM_0 + i), 0); + int mixer_id = ctx->mixer_hw_caps[i].id; + + SDE_REG_WRITE(c, CTL_LAYER(mixer_id), 0); + SDE_REG_WRITE(c, CTL_LAYER_EXT(mixer_id), 0); + SDE_REG_WRITE(c, CTL_LAYER_EXT2(mixer_id), 0); + SDE_REG_WRITE(c, CTL_LAYER_EXT3(mixer_id), 0); } }