sparc32,leon: always include leon_smp + leon_mm in build
Fix-up leon specific assembler to use ASI_LEON_MMUREGS Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com>
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5561cd2698
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3107948848
6 changed files with 2 additions and 28 deletions
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@ -254,16 +254,4 @@ extern int leon_ipi_irq;
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#define _pfn_valid(pfn) ((pfn < last_valid_pfn) && (pfn >= PFN(phys_base)))
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#define _pfn_valid(pfn) ((pfn < last_valid_pfn) && (pfn >= PFN(phys_base)))
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#define _SRMMU_PTE_PMASK_LEON 0xffffffff
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#define _SRMMU_PTE_PMASK_LEON 0xffffffff
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#ifndef CONFIG_SPARC_LEON
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/* nop definitions for !LEON case */
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#define leon_switch_mm() do {} while (0)
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#define init_leon() do {} while (0)
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#define leon_smp_done() do {} while (0)
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#define leon_boot_cpus() do {} while (0)
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#define leon_boot_one_cpu(i, t) 1
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#define leon_init_smp() do {} while (0)
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#endif /* !defined(CONFIG_SPARC_LEON) */
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#endif
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#endif
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@ -393,7 +393,6 @@ linux_trap_ipi15_sun4d:
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/* FIXME */
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/* FIXME */
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1: b,a 1b
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1: b,a 1b
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#ifdef CONFIG_SPARC_LEON
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.globl smpleon_ipi
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.globl smpleon_ipi
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.extern leon_ipi_interrupt
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.extern leon_ipi_interrupt
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/* SMP per-cpu IPI interrupts are handled specially. */
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/* SMP per-cpu IPI interrupts are handled specially. */
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@ -424,8 +423,6 @@ linux_trap_ipi15_leon:
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b ret_trap_lockless_ipi
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b ret_trap_lockless_ipi
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clr %l6
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clr %l6
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#endif /* CONFIG_SPARC_LEON */
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#endif /* CONFIG_SMP */
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#endif /* CONFIG_SMP */
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/* This routine handles illegal instructions and privileged
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/* This routine handles illegal instructions and privileged
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@ -387,11 +387,8 @@ execute_in_high_mem:
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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ldub [%g2 + %lo(boot_cpu_id)], %g1
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ldub [%g2 + %lo(boot_cpu_id)], %g1
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cmp %g1, 0xff ! unset means first CPU
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cmp %g1, 0xff ! unset means first CPU
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#ifdef CONFIG_SPARC_LEON
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/* XXX Hack to allow build - remove ifdef later */
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bne leon_smp_cpu_startup ! continue only with master
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bne leon_smp_cpu_startup ! continue only with master
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nop
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nop
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#endif
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#endif
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#endif
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/* Get CPU-ID from most significant 4-bit of ASR17 */
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/* Get CPU-ID from most significant 4-bit of ASR17 */
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rd %asr17, %g1
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rd %asr17, %g1
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@ -48,8 +48,6 @@
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#include "kernel.h"
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#include "kernel.h"
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#ifdef CONFIG_SPARC_LEON
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#include "irq.h"
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#include "irq.h"
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extern ctxd_t *srmmu_ctx_table_phys;
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extern ctxd_t *srmmu_ctx_table_phys;
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@ -507,5 +505,3 @@ void __init leon_init_smp(void)
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sparc32_ipi_ops = &leon_ipi_ops;
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sparc32_ipi_ops = &leon_ipi_ops;
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}
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}
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#endif /* CONFIG_SPARC_LEON */
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@ -149,8 +149,6 @@ sun4d_cpu_startup:
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b,a smp_do_cpu_idle
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b,a smp_do_cpu_idle
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#ifdef CONFIG_SPARC_LEON
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__CPUINIT
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__CPUINIT
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.align 4
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.align 4
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.global leon_smp_cpu_startup, smp_penguin_ctable
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.global leon_smp_cpu_startup, smp_penguin_ctable
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@ -161,7 +159,7 @@ leon_smp_cpu_startup:
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ld [%g1+4],%g1
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ld [%g1+4],%g1
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srl %g1,4,%g1
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srl %g1,4,%g1
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set 0x00000100,%g5 /* SRMMU_CTXTBL_PTR */
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set 0x00000100,%g5 /* SRMMU_CTXTBL_PTR */
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sta %g1, [%g5] ASI_M_MMUREGS
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sta %g1, [%g5] ASI_LEON_MMUREGS
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/* Set up a sane %psr -- PIL<0xf> S<0x1> PS<0x1> CWP<0x0> */
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/* Set up a sane %psr -- PIL<0xf> S<0x1> PS<0x1> CWP<0x0> */
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set (PSR_PIL | PSR_S | PSR_PS), %g1
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set (PSR_PIL | PSR_S | PSR_PS), %g1
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@ -207,5 +205,3 @@ leon_smp_cpu_startup:
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nop
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nop
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b,a smp_do_cpu_idle
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b,a smp_do_cpu_idle
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#endif
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@ -9,7 +9,7 @@ obj-y += fault_$(BITS).o
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obj-y += init_$(BITS).o
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obj-y += init_$(BITS).o
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obj-$(CONFIG_SPARC32) += extable.o srmmu.o iommu.o io-unit.o
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obj-$(CONFIG_SPARC32) += extable.o srmmu.o iommu.o io-unit.o
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obj-$(CONFIG_SPARC32) += hypersparc.o viking.o tsunami.o swift.o
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obj-$(CONFIG_SPARC32) += hypersparc.o viking.o tsunami.o swift.o
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obj-$(CONFIG_SPARC_LEON)+= leon_mm.o
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obj-$(CONFIG_SPARC32) += leon_mm.o
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# Only used by sparc64
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# Only used by sparc64
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obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
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obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
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