clk: msm: clock: Add support for programming the GCC_GPU_IREF_EN register
Add a new gcc_gpu_iref_clk that the graphics driver can control as needed. The default state of the clock is ON; so having this control will mean saving current. CRs-Fixed: 1024948 Change-Id: I562bb546f49b1605f20fb7d705f40584d190230b Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
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3 changed files with 14 additions and 0 deletions
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@ -1683,6 +1683,17 @@ static struct branch_clk gcc_gpu_snoc_dvm_gfx_clk = {
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},
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};
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static struct branch_clk gcc_gpu_iref_clk = {
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.cbcr_reg = GCC_GPU_IREF_EN,
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.has_sibling = 1,
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.base = &virt_base,
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.c = {
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.dbg_name = "gcc_gpu_iref_clk",
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.ops = &clk_ops_branch,
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CLK_INIT(gcc_gpu_iref_clk.c),
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},
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};
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static struct local_vote_clk gcc_bimc_hmss_axi_clk = {
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.cbcr_reg = GCC_BIMC_HMSS_AXI_CBCR,
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.vote_reg = GCC_APCS_CLOCK_BRANCH_ENA_VOTE,
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@ -2645,6 +2656,7 @@ static struct clk_lookup msm_clocks_gcc_cobalt[] = {
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CLK_LIST(gcc_gpu_bimc_gfx_src_clk),
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CLK_LIST(gcc_gpu_cfg_ahb_clk),
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CLK_LIST(gcc_gpu_snoc_dvm_gfx_clk),
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CLK_LIST(gcc_gpu_iref_clk),
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CLK_LIST(gcc_bimc_hmss_axi_clk),
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CLK_LIST(gcc_hmss_ahb_clk),
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CLK_LIST(gcc_hmss_dvm_bus_clk),
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@ -199,6 +199,7 @@
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#define clk_gcc_gpu_bimc_gfx_src_clk 0x377cb748
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#define clk_gcc_bimc_hmss_axi_clk 0x84653931
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#define clk_gcc_gpu_cfg_ahb_clk 0x72f20a57
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#define clk_gcc_gpu_iref_clk 0xfd82abad
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#define clk_gcc_hmss_ahb_clk 0x62818713
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#define clk_gcc_hmss_dvm_bus_clk 0x17cc8b53
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#define clk_gcc_hmss_rbcpr_clk 0x699183be
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@ -170,6 +170,7 @@
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#define GCC_GPU_BIMC_GFX_SRC_CBCR 0x7100C
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#define GCC_GPU_CFG_AHB_CBCR 0x71004
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#define GCC_GPU_SNOC_DVM_GFX_CBCR 0x71018
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#define GCC_GPU_IREF_EN 0x88010
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#define GCC_BIMC_HMSS_AXI_CBCR 0x48004
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#define GCC_HMSS_AHB_CBCR 0x48000
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#define GCC_HMSS_DVM_BUS_CBCR 0x4808C
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